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* Re: [PATCH 1/6] ARM: at91: prepare sama5 dt boards transition to common clk
       [not found] ` <1375953654-11168-1-git-send-email-b.brezillon@overkiz.com>
@ 2013-10-09 13:04   ` Nicolas Ferre
  0 siblings, 0 replies; 6+ messages in thread
From: Nicolas Ferre @ 2013-10-09 13:04 UTC (permalink / raw)
  To: Boris BREZILLON, Russell King, Andrew Victor,
	Jean-Christophe Plagniol-Villard, Ludovic Desroches,
	Lorenzo Pieralisi
  Cc: linux-arm-kernel, linux-kernel, devicetree

On 08/08/2013 11:20, Boris BREZILLON :
> This patch prepare the transition to common clk for sama5 dt boards by
> replacing the timer init callback.
>
> Clocks registration cannot be done in early init callback (as formerly done
> by the old clk implementation) because it requires dynamic allocation
> which is not ready yet during early init.
>
> In the other hand, at91 clocks must be registered before
> at91sam926x_pit_init is called because PIT (Periodic Interval Timer) driver
> request the master clk (mck).
>
> A new function (at91sama5_dt_timer_init) is created to fullfil these needs.
> This function registers all at91 clks using the dt definition before
> calling the PIT init function.
> The device tree clock registration is enabled only if common clk is
> selected. Else the old clk registration is been done during
> at91_dt_initialize call.
>
> Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

> ---
>   arch/arm/mach-at91/board-dt-sama5.c |   10 +++++++++-
>   1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
> index ad95f6a..10b6913 100644
> --- a/arch/arm/mach-at91/board-dt-sama5.c
> +++ b/arch/arm/mach-at91/board-dt-sama5.c
> @@ -16,6 +16,7 @@
>   #include <linux/of_irq.h>
>   #include <linux/of_platform.h>
>   #include <linux/phy.h>
> +#include <linux/clk-provider.h>
>
>   #include <asm/setup.h>
>   #include <asm/irq.h>
> @@ -26,6 +27,13 @@
>   #include "at91_aic.h"
>   #include "generic.h"
>
> +static void __init sama5_dt_timer_init(void)
> +{
> +#if defined(CONFIG_COMMON_CLK)
> +	of_clk_init(NULL);
> +#endif
> +	at91sam926x_pit_init();
> +}
>
>   static const struct of_device_id irq_of_match[] __initconst = {
>
> @@ -77,7 +85,7 @@ static const char *sama5_dt_board_compat[] __initdata = {
>
>   DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
>   	/* Maintainer: Atmel */
> -	.init_time	= at91sam926x_pit_init,
> +	.init_time	= sama5_dt_timer_init,
>   	.map_io		= at91_map_io,
>   	.handle_irq	= at91_aic5_handle_irq,
>   	.init_early	= at91_dt_initialize,
>


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/6] ARM: at91: prepare common clk transition for sama5d3 SoC
       [not found]   ` <1375953690-11207-1-git-send-email-b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>
@ 2013-10-09 13:05     ` Nicolas Ferre
  0 siblings, 0 replies; 6+ messages in thread
From: Nicolas Ferre @ 2013-10-09 13:05 UTC (permalink / raw)
  To: Boris BREZILLON, Russell King, Andrew Victor,
	Jean-Christophe Plagniol-Villard, Ludovic Desroches,
	Lorenzo Pieralisi
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA

On 08/08/2013 11:21, Boris BREZILLON :
> This patch enclose sama5d3 old clk registration in
> "#if defined(CONFIG_OLD_CLK_AT91) #endif" sections.
>
> Signed-off-by: Boris BREZILLON <b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>

Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>

And... do not forget to remove completely the code when transition is 
done (ie: in "[PATCH 6/6] ARM: at91/dt: remove old main clk definition 
from sama5d3xcm.dtsi").


> ---
>   arch/arm/mach-at91/sama5d3.c |    6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
> index 0003949..3426098 100644
> --- a/arch/arm/mach-at91/sama5d3.c
> +++ b/arch/arm/mach-at91/sama5d3.c
> @@ -19,9 +19,10 @@
>
>   #include "soc.h"
>   #include "generic.h"
> -#include "clock.h"
>   #include "sam9_smc.h"
>
> +#if defined(CONFIG_OLD_CLK_AT91)
> +#include "clock.h"
>   /* --------------------------------------------------------------------
>    *  Clocks
>    * -------------------------------------------------------------------- */
> @@ -361,6 +362,7 @@ static void __init sama5d3_register_clocks(void)
>   	clk_register(&pck1);
>   	clk_register(&pck2);
>   }
> +#endif
>
>   /* --------------------------------------------------------------------
>    *  AT91SAM9x5 processor initialization
> @@ -373,5 +375,7 @@ static void __init sama5d3_map_io(void)
>
>   AT91_SOC_START(sama5d3)
>   	.map_io = sama5d3_map_io,
> +#if defined(CONFIG_OLD_CLK_AT91)
>   	.register_clocks = sama5d3_register_clocks,
> +#endif
>   AT91_SOC_END
>


-- 
Nicolas Ferre
--
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 3/6] ARM: at91/dt: define sama5d3 clocks
       [not found]   ` <1375954299-11285-1-git-send-email-b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>
@ 2013-10-09 13:10     ` Nicolas Ferre
  0 siblings, 0 replies; 6+ messages in thread
From: Nicolas Ferre @ 2013-10-09 13:10 UTC (permalink / raw)
  To: Boris BREZILLON, Russell King, Andrew Victor,
	Jean-Christophe Plagniol-Villard, Ludovic Desroches,
	Lorenzo Pieralisi
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA

On 08/08/2013 11:31, Boris BREZILLON :
> Define sama5d3 clocks in sama5d3 device tree.
> Add references to the appropriate clocks in each peripheral.
>
> Signed-off-by: Boris BREZILLON <b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>

Do not forget to remove the macros and change file paths...

> ---
>   arch/arm/boot/dts/sama5d3.dtsi      |  331 ++++++++++++++++++++++++++++++++++-
>   arch/arm/boot/dts/sama5d3_can.dtsi  |   19 ++
>   arch/arm/boot/dts/sama5d3_emac.dtsi |   12 ++
>   arch/arm/boot/dts/sama5d3_gmac.dtsi |   12 ++
>   arch/arm/boot/dts/sama5d3_lcd.dtsi  |   17 ++
>   arch/arm/boot/dts/sama5d3_mci2.dtsi |   11 ++
>   arch/arm/boot/dts/sama5d3_tcb1.dtsi |   12 ++
>   arch/arm/boot/dts/sama5d3_uart.dtsi |   19 ++
>   8 files changed, 431 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
> index f0ca1ba..e2791c5 100644
> --- a/arch/arm/boot/dts/sama5d3.dtsi
> +++ b/arch/arm/boot/dts/sama5d3.dtsi
> @@ -14,6 +14,10 @@
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/gpio/gpio.h>
>   #include <dt-bindings/at91/sama5d3/peripherals.h>
> +#include <dt-bindings/clk/at91/common/clk-system.h>
> +#include <dt-bindings/clk/at91/common/pmc.h>
> +#include <dt-bindings/clk/at91/at91sam9x5/clk-peripheral.h>
> +#include <dt-bindings/clk/at91/common/clk-pll.h>
>
>   / {
>   	model = "Atmel SAMA5D3 family SoC";
> @@ -52,6 +56,14 @@
>   		reg = <0x20000000 0x8000000>;
>   	};
>
> +	clocks {
> +		adc_op_clk: adc_op_clk{
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <20000000>;
> +		};
> +	};
> +
>   	ahb {
>   		compatible = "simple-bus";
>   		#address-cells = <1>;
> @@ -75,6 +87,8 @@
>   				status = "disabled";
>   				#address-cells = <1>;
>   				#size-cells = <0>;
> +				clocks = <&periph SAMA5D3_ID_HSMCI0>;
> +				clock-names = "mci_clk";
>   			};
>
>   			spi0: spi@f0004000 {
> @@ -88,6 +102,8 @@
>   				dma-names = "tx", "rx";
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_spi0>;
> +				clocks = <&periph SAMA5D3_ID_SPI0>;
> +				clock-names = "spi_clk";
>   				status = "disabled";
>   			};
>
> @@ -97,6 +113,8 @@
>   				interrupts = <SAMA5D3_ID_SSC0 IRQ_TYPE_LEVEL_HIGH 4>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
> +				clocks = <&periph SAMA5D3_ID_SSC0>;
> +				clock-names = "pclk";
>   				status = "disabled";
>   			};
>
> @@ -104,6 +122,8 @@
>   				compatible = "atmel,at91sam9x5-tcb";
>   				reg = <0xf0010000 0x100>;
>   				interrupts = <SAMA5D3_ID_TC0 IRQ_TYPE_LEVEL_HIGH 0>;
> +				clocks = <&periph SAMA5D3_ID_TC0>;
> +				clock-names = "t0_clk";
>   			};
>
>   			i2c0: i2c@f0014000 {
> @@ -117,6 +137,7 @@
>   				pinctrl-0 = <&pinctrl_i2c0>;
>   				#address-cells = <1>;
>   				#size-cells = <0>;
> +				clocks = <&periph SAMA5D3_ID_TWI0>;
>   				status = "disabled";
>   			};
>
> @@ -131,6 +152,7 @@
>   				pinctrl-0 = <&pinctrl_i2c1>;
>   				#address-cells = <1>;
>   				#size-cells = <0>;
> +				clocks = <&periph SAMA5D3_ID_TWI1>;
>   				status = "disabled";
>   			};
>
> @@ -140,6 +162,8 @@
>   				interrupts = <SAMA5D3_ID_USART0 IRQ_TYPE_LEVEL_HIGH 5>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_usart0>;
> +				clocks = <&periph SAMA5D3_ID_USART0>;
> +				clock-names = "usart";
>   				status = "disabled";
>   			};
>
> @@ -149,6 +173,8 @@
>   				interrupts = <SAMA5D3_ID_USART1 IRQ_TYPE_LEVEL_HIGH 5>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_usart1>;
> +				clocks = <&periph SAMA5D3_ID_USART1>;
> +				clock-names = "usart";
>   				status = "disabled";
>   			};
>
> @@ -170,6 +196,8 @@
>   				status = "disabled";
>   				#address-cells = <1>;
>   				#size-cells = <0>;
> +				clocks = <&periph SAMA5D3_ID_HSMCI1>;
> +				clock-names = "mci_clk";
>   			};
>
>   			spi1: spi@f8008000 {
> @@ -183,6 +211,8 @@
>   				dma-names = "tx", "rx";
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_spi1>;
> +				clocks = <&periph SAMA5D3_ID_SPI1>;
> +				clock-names = "spi_clk";
>   				status = "disabled";
>   			};
>
> @@ -192,6 +222,8 @@
>   				interrupts = <SAMA5D3_ID_SSC1 IRQ_TYPE_LEVEL_HIGH 4>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
> +				clocks = <&periph SAMA5D3_ID_SSC1>;
> +				clock-names = "pclk";
>   				status = "disabled";
>   			};
>
> @@ -215,6 +247,9 @@
>   					&pinctrl_adc0_ad10
>   					&pinctrl_adc0_ad11
>   					>;
> +				clocks = <&periph SAMA5D3_ID_ADC>,
> +					 <&adc_op_clk>;
> +				clock-names = "adc_clk", "adc_op_clk";
>   				atmel,adc-channel-base = <0x50>;
>   				atmel,adc-channels-used = <0xfff>;
>   				atmel,adc-drdy-mask = <0x1000000>;
> @@ -270,6 +305,7 @@
>   				dma-names = "tx", "rx";
>   				#address-cells = <1>;
>   				#size-cells = <0>;
> +				clocks = <&periph SAMA5D3_ID_TWI2>;
>   				status = "disabled";
>   			};
>
> @@ -279,6 +315,8 @@
>   				interrupts = <SAMA5D3_ID_USART2 IRQ_TYPE_LEVEL_HIGH 5>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_usart2>;
> +				clocks = <&periph SAMA5D3_ID_USART2>;
> +				clock-names = "usart";
>   				status = "disabled";
>   			};
>
> @@ -288,6 +326,8 @@
>   				interrupts = <SAMA5D3_ID_USART3 IRQ_TYPE_LEVEL_HIGH 5>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_usart3>;
> +				clocks = <&periph SAMA5D3_ID_USART3>;
> +				clock-names = "usart";
>   				status = "disabled";
>   			};
>
> @@ -300,7 +340,7 @@
>   			aes@f8038000 {
>   				compatible = "atmel,sam9g46-aes";
>   				reg = <0xf8038000 0x100>;
> -				interrupts = <SAMA5D3_ID_AES 4 0>;
> +				interrupts = <SAMA5D3_ID_AES IRQ_TYPE_LEVEL_HIGH 0>;
>   			};
>
>   			tdes@f803c000 {
> @@ -314,6 +354,8 @@
>   				reg = <0xffffe600 0x200>;
>   				interrupts = <SAMA5D3_ID_DMA0 IRQ_TYPE_LEVEL_HIGH 0>;
>   				#dma-cells = <2>;
> +				clocks = <&periph SAMA5D3_ID_DMA0>;
> +				clock-names = "dma_clk";
>   			};
>
>   			dma1: dma-controller@ffffe800 {
> @@ -321,6 +363,8 @@
>   				reg = <0xffffe800 0x200>;
>   				interrupts = <SAMA5D3_ID_DMA1 IRQ_TYPE_LEVEL_HIGH 0>;
>   				#dma-cells = <2>;
> +				clocks = <&periph SAMA5D3_ID_DMA1>;
> +				clock-names = "dma_clk";
>   			};
>
>   			ramc0: ramc@ffffea00 {
> @@ -334,6 +378,8 @@
>   				interrupts = <SAMA5D3_ID_DBGU IRQ_TYPE_LEVEL_HIGH 7>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_dbgu>;
> +				clocks = <&periph 2>;
> +				clock-names = "usart";
>   				status = "disabled";
>   			};
>
> @@ -622,6 +668,7 @@
>   					gpio-controller;
>   					interrupt-controller;
>   					#interrupt-cells = <2>;
> +					clocks = <&periph 6>;
>   				};
>
>   				pioB: gpio@fffff400 {
> @@ -632,6 +679,7 @@
>   					gpio-controller;
>   					interrupt-controller;
>   					#interrupt-cells = <2>;
> +					clocks = <&periph 7>;
>   				};
>
>   				pioC: gpio@fffff600 {
> @@ -642,6 +690,7 @@
>   					gpio-controller;
>   					interrupt-controller;
>   					#interrupt-cells = <2>;
> +					clocks = <&periph 8>;
>   				};
>
>   				pioD: gpio@fffff800 {
> @@ -652,6 +701,7 @@
>   					gpio-controller;
>   					interrupt-controller;
>   					#interrupt-cells = <2>;
> +					clocks = <&periph 9>;
>   				};
>
>   				pioE: gpio@fffffa00 {
> @@ -662,12 +712,279 @@
>   					gpio-controller;
>   					interrupt-controller;
>   					#interrupt-cells = <2>;
> +					clocks = <&periph 10>;
>   				};
>   			};
>
>   			pmc: pmc@fffffc00 {
> -				compatible = "atmel,at91rm9200-pmc";
> +				compatible = "atmel,sama5d3-pmc";
>   				reg = <0xfffffc00 0x120>;
> +				interrupts = <AT91_ID_SYS IRQ_TYPE_LEVEL_HIGH 7>;
> +				interrupt-controller;
> +				#interrupt-cells = <2>;
> +
> +				clk32k: slck {
> +					compatible = "fixed-clock";
> +					#clock-cells = <0>;
> +					clock-frequency = <32768>;
> +				};
> +
> +				main: mainck {
> +					compatible = "atmel,at91rm9200-clk-main";
> +					interrupt-parent = <&pmc>;
> +					interrupts = <AT91_PMC_MOSCS IRQ_TYPE_LEVEL_HIGH>;
> +					#clock-cells = <0>;
> +					clocks = <&clk32k>;
> +				};
> +
> +				plla: pllack {
> +					compatible = "atmel,sama5d3-clk-pll";
> +					interrupt-parent = <&pmc>;
> +					interrupts = <AT91_PMC_LOCKA IRQ_TYPE_LEVEL_HIGH>;
> +					#clock-cells = <0>;
> +					clocks = <&main>;
> +					atmel,clk-id = <AT91_PLLA_CLK>;
> +					atmel,clk-input-range = <8000000 50000000>;
> +					#atmel,pll-clk-output-range-cells = <4>;
> +					atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
> +				};
> +
> +				plladiv: plladivck {
> +					compatible = "atmel,at91sam9x5-clk-plldiv";
> +					#clock-cells = <0>;
> +					clocks = <&plla>;
> +				};
> +
> +				utmi: utmick {
> +					compatible = "atmel,at91sam9x5-clk-utmi";
> +					interrupt-parent = <&pmc>;
> +					interrupts = <AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>;
> +					#clock-cells = <0>;
> +					clocks = <&main>;
> +				};
> +
> +				mck: masterck {
> +					compatible = "atmel,at91sam9x5-clk-master";
> +					interrupt-parent = <&pmc>;
> +					interrupts = <AT91_PMC_MCKRDY IRQ_TYPE_LEVEL_HIGH>;
> +					#clock-cells = <0>;
> +					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
> +					atmel,clk-output-range = <0 166000000>;
> +					atmel,clk-divisors = <1 2 4 3>;
> +				};
> +
> +				usb: usbck {
> +					compatible = "atmel,at91sam9x5-clk-usb";
> +					#clock-cells = <0>;
> +					clocks = <&plladiv>, <&utmi>;
> +				};
> +
> +				prog: progck {
> +					compatible = "atmel,at91sam9x5-clk-programmable";
> +					interrupt-parent = <&pmc>;
> +					#clock-cells = <1>;
> +					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
> +
> +					prog0 {
> +						atmel,clk-id = <0>;
> +						interrupts = <AT91_PMC_PCKRDY(0) IRQ_TYPE_LEVEL_HIGH>;
> +					};
> +
> +					prog1 {
> +						atmel,clk-id = <1>;
> +						interrupts = <AT91_PMC_PCKRDY(1) IRQ_TYPE_LEVEL_HIGH>;
> +					};
> +
> +					prog2 {
> +						atmel,clk-id = <2>;
> +						interrupts = <AT91_PMC_PCKRDY(2) IRQ_TYPE_LEVEL_HIGH>;
> +					};
> +				};
> +
> +				smd: smdclk {
> +					compatible = "atmel,at91sam9x5-clk-smd";
> +					#clock-cells = <0>;
> +					clocks = <&plladiv>, <&utmi>;
> +				};
> +
> +				system: systemck {
> +					compatible = "atmel,at91rm9200-clk-system";
> +					#clock-cells = <1>;
> +
> +					ddrck {
> +						atmel,clk-id = <AT91_DDRCK_SYS_CLK>;
> +					};
> +
> +					smdck {
> +						atmel,clk-id = <AT91_SMDCK_SYS_CLK>;
> +					};
> +
> +					uhpck {
> +						atmel,clk-id = <AT91_UHP_SYS_CLK>;
> +					};
> +
> +					udpck {
> +						atmel,clk-id = <AT91_UDP_SYS_CLK>;
> +					};
> +
> +					pck0 {
> +						atmel,clk-id = <AT91_PROG_SYS_CLK(0)>;
> +					};
> +
> +					pck1 {
> +						atmel,clk-id = <AT91_PROG_SYS_CLK(1)>;
> +					};
> +
> +					pck2 {
> +						atmel,clk-id = <AT91_PROG_SYS_CLK(2)>;
> +					};
> +				};
> +
> +				periph: periphck {
> +					compatible = "atmel,at91sam9x5-clk-peripheral";
> +					#clock-cells = <1>;
> +					clocks = <&mck>;
> +
> +					dbgu_clk {
> +						atmel,clk-id = <SAMA5D3_ID_DBGU>;
> +					};
> +
> +					pioA_clk {
> +						atmel,clk-id = <SAMA5D3_ID_PIOA>;
> +					};
> +
> +					pioB_clk {
> +						atmel,clk-id = <SAMA5D3_ID_PIOB>;
> +					};
> +
> +					pioC_clk {
> +						atmel,clk-id = <SAMA5D3_ID_PIOC>;
> +					};
> +
> +					pioD_clk {
> +						atmel,clk-id = <SAMA5D3_ID_PIOD>;
> +					};
> +
> +					pioE_clk {
> +						atmel,clk-id = <SAMA5D3_ID_PIOE>;
> +					};
> +
> +					usart0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_USART0>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					usart1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_USART1>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					usart2_clk {
> +						atmel,clk-id = <SAMA5D3_ID_USART2>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					usart3_clk {
> +						atmel,clk-id = <SAMA5D3_ID_USART3>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					twi0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_TWI0>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					twi1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_TWI1>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					twi2_clk {
> +						atmel,clk-id = <SAMA5D3_ID_TWI2>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					mci0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_HSMCI0>;
> +					};
> +
> +					mci1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_HSMCI1>;
> +					};
> +
> +					spi0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_SPI0>;
> +					};
> +
> +					spi1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_SPI1>;
> +					};
> +
> +					tcb0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_TC0>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					pwm_clk {
> +						atmel,clk-id = <SAMA5D3_ID_PWM>;
> +					};
> +
> +					adc_clk {
> +						atmel,clk-id = <SAMA5D3_ID_ADC>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					dma0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_DMA0>;
> +					};
> +
> +					dma1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_DMA1>;
> +					};
> +
> +					uhphs_clk {
> +						atmel,clk-id = <SAMA5D3_ID_UHPHS>;
> +					};
> +
> +					udphs_clk {
> +						atmel,clk-id = <SAMA5D3_ID_UDPHS>;
> +					};
> +
> +					isi_clk {
> +						atmel,clk-id = <SAMA5D3_ID_ISI>;
> +					};
> +
> +					ssc0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_SSC0>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					ssc1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_SSC1>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					sha_clk {
> +						atmel,clk-id = <SAMA5D3_ID_SHA>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV8>;
> +					};
> +
> +					aes_clk {
> +						atmel,clk-id = <SAMA5D3_ID_AES>;
> +					};
> +
> +					tdes_clk {
> +						atmel,clk-id = <SAMA5D3_ID_TDES>;
> +					};
> +
> +					trng_clk {
> +						atmel,clk-id = <SAMA5D3_ID_TRNG>;
> +					};
> +
> +					fuse_clk {
> +						atmel,clk-id = <SAMA5D3_ID_FUSE>;
> +					};
> +				};
>   			};
>
>   			rstc@fffffe00 {
> @@ -679,6 +996,7 @@
>   				compatible = "atmel,at91sam9260-pit";
>   				reg = <0xfffffe30 0xf>;
>   				interrupts = <AT91_ID_PIT IRQ_TYPE_LEVEL_HIGH 5>;
> +				clocks = <&mck>;
>   			};
>
>   			watchdog@fffffe40 {
> @@ -701,6 +1019,8 @@
>   			reg = <0x00500000 0x100000
>   			       0xf8030000 0x4000>;
>   			interrupts = <SAMA5D3_ID_UDPHS IRQ_TYPE_LEVEL_HIGH 2>;
> +			clocks = <&periph SAMA5D3_ID_UDPHS>, <&utmi>;
> +			clock-names = "pclk", "hclk";
>   			status = "disabled";
>
>   			ep0 {
> @@ -813,6 +1133,10 @@
>   			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
>   			reg = <0x00600000 0x100000>;
>   			interrupts = <SAMA5D3_ID_UHPHS IRQ_TYPE_LEVEL_HIGH 2>;
> +			clocks = <&usb>, <&periph SAMA5D3_ID_UHPHS>,
> +				 <&periph SAMA5D3_ID_UHPHS>,
> +				 <&system AT91_UHP_SYS_CLK>;
> +			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
>   			status = "disabled";
>   		};
>
> @@ -820,6 +1144,9 @@
>   			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
>   			reg = <0x00700000 0x100000>;
>   			interrupts = <SAMA5D3_ID_UHPHS IRQ_TYPE_LEVEL_HIGH 2>;
> +			clocks = <&periph SAMA5D3_ID_UHPHS>,
> +				 <&system AT91_UHP_SYS_CLK>;
> +			clock-names = "ehci_clk", "uhpck";
>   			status = "disabled";
>   		};
>
> diff --git a/arch/arm/boot/dts/sama5d3_can.dtsi b/arch/arm/boot/dts/sama5d3_can.dtsi
> index 55b2d9f..0c3fa82 100644
> --- a/arch/arm/boot/dts/sama5d3_can.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_can.dtsi
> @@ -10,6 +10,7 @@
>   #include <dt-bindings/pinctrl/at91.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/at91/sama5d3/peripherals.h>
> +#include <dt-bindings/clk/at91/at91sam9x5/clk-peripheral.h>
>
>   / {
>   	ahb {
> @@ -33,12 +34,28 @@
>
>   			};
>
> +			pmc: pmc@fffffc00 {
> +				periph: periphck {
> +					can0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_CAN0>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					can1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_CAN1>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +				};
> +			};
> +
>   			can0: can@f000c000 {
>   				compatible = "atmel,at91sam9x5-can";
>   				reg = <0xf000c000 0x300>;
>   				interrupts = <SAMA5D3_ID_CAN0 IRQ_TYPE_LEVEL_HIGH 3>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_can0_rx_tx>;
> +				clocks = <&periph SAMA5D3_ID_CAN0>;
> +				clock-names = "can_clk";
>   				status = "disabled";
>   			};
>
> @@ -48,6 +65,8 @@
>   				interrupts = <SAMA5D3_ID_CAN1 IRQ_TYPE_LEVEL_HIGH 3>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_can1_rx_tx>;
> +				clocks = <&periph SAMA5D3_ID_CAN1>;
> +				clock-names = "can_clk";
>   				status = "disabled";
>   			};
>   		};
> diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi
> index fb4628d..d4a9556 100644
> --- a/arch/arm/boot/dts/sama5d3_emac.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_emac.dtsi
> @@ -10,6 +10,7 @@
>   #include <dt-bindings/pinctrl/at91.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/at91/sama5d3/peripherals.h>
> +#include <dt-bindings/clk/at91/at91sam9x5/clk-peripheral.h>
>
>   / {
>   	ahb {
> @@ -32,12 +33,23 @@
>   				};
>   			};
>
> +			pmc: pmc@fffffc00 {
> +				periph: periphck {
> +					macb1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_EMAC>;
> +					};
> +				};
> +			};
> +
>   			macb1: ethernet@f802c000 {
>   				compatible = "cdns,at32ap7000-macb", "cdns,macb";
>   				reg = <0xf802c000 0x100>;
>   				interrupts = <SAMA5D3_ID_EMAC IRQ_TYPE_LEVEL_HIGH 3>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_macb1_rmii>;
> +				clocks = <&periph SAMA5D3_ID_EMAC>,
> +					 <&periph SAMA5D3_ID_EMAC>;
> +				clock-names = "hclk", "pclk";
>   				status = "disabled";
>   			};
>   		};
> diff --git a/arch/arm/boot/dts/sama5d3_gmac.dtsi b/arch/arm/boot/dts/sama5d3_gmac.dtsi
> index f92c721..8082021 100644
> --- a/arch/arm/boot/dts/sama5d3_gmac.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_gmac.dtsi
> @@ -10,6 +10,7 @@
>   #include <dt-bindings/pinctrl/at91.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/at91/sama5d3/peripherals.h>
> +#include <dt-bindings/clk/at91/at91sam9x5/clk-peripheral.h>
>
>   / {
>   	ahb {
> @@ -65,12 +66,23 @@
>   				};
>   			};
>
> +			pmc: pmc@fffffc00 {
> +				periph: periphck {
> +					macb0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_GMAC>;
> +					};
> +				};
> +			};
> +
>   			macb0: ethernet@f0028000 {
>   				compatible = "cdns,pc302-gem", "cdns,gem";
>   				reg = <0xf0028000 0x100>;
>   				interrupts = <SAMA5D3_ID_GMAC IRQ_TYPE_LEVEL_HIGH 3>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
> +				clocks = <&periph SAMA5D3_ID_GMAC>,
> +					 <&periph SAMA5D3_ID_GMAC>;
> +				clock-names = "hclk", "pclk";
>   				status = "disabled";
>   			};
>   		};
> diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
> index 01f52a7..15ff059 100644
> --- a/arch/arm/boot/dts/sama5d3_lcd.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
> @@ -9,6 +9,9 @@
>
>   #include <dt-bindings/pinctrl/at91.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/at91/sama5d3/peripherals.h>
> +#include <dt-bindings/clk/at91/common/clk-system.h>
> +#include <dt-bindings/clk/at91/at91sam9x5/clk-peripheral.h>
>
>   / {
>   	ahb {
> @@ -50,6 +53,20 @@
>   					};
>   				};
>   			};
> +
> +			pmc: pmc@fffffc00 {
> +				periph: periphck {
> +					lcdc_clk {
> +						atmel,clk-id = <SAMA5D3_ID_LCDC>;
> +					};
> +				};
> +
> +				system: systemck {
> +					lcdck {
> +						atmel,clk-id = <AT91_LCDCK_SYS_CLK>;
> +					};
> +				};
> +			};
>   		};
>   	};
>   };
> diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi
> index 6471610..7cef03e 100644
> --- a/arch/arm/boot/dts/sama5d3_mci2.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
> @@ -10,6 +10,7 @@
>   #include <dt-bindings/pinctrl/at91.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/at91/sama5d3/peripherals.h>
> +#include <dt-bindings/clk/at91/at91sam9x5/clk-peripheral.h>
>
>   / {
>   	ahb {
> @@ -31,6 +32,14 @@
>   				};
>   			};
>
> +			pmc: pmc@fffffc00 {
> +				periph: periphck {
> +					mci2_clk {
> +						atmel,clk-id = <SAMA5D3_ID_HSMCI2>;
> +					};
> +				};
> +			};
> +
>   			mmc2: mmc@f8004000 {
>   				compatible = "atmel,hsmci";
>   				reg = <0xf8004000 0x600>;
> @@ -39,6 +48,8 @@
>   				dma-names = "rxtx";
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
> +				clocks = <&periph SAMA5D3_ID_HSMCI2>;
> +				clock-names = "mci_clk";
>   				status = "disabled";
>   				#address-cells = <1>;
>   				#size-cells = <0>;
> diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
> index bd26568..fb00a22 100644
> --- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
> @@ -10,6 +10,7 @@
>   #include <dt-bindings/pinctrl/at91.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/at91/sama5d3/peripherals.h>
> +#include <dt-bindings/clk/at91/at91sam9x5/clk-peripheral.h>
>
>   / {
>   	aliases {
> @@ -18,10 +19,21 @@
>
>   	ahb {
>   		apb {
> +			pmc: pmc@fffffc00 {
> +				periph: periphck {
> +					tcb1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_TC1>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +				};
> +			};
> +
>   			tcb1: timer@f8014000 {
>   				compatible = "atmel,at91sam9x5-tcb";
>   				reg = <0xf8014000 0x100>;
>   				interrupts = <SAMA5D3_ID_TC1 IRQ_TYPE_LEVEL_HIGH 0>;
> +				clocks = <&periph SAMA5D3_ID_TC1>;
> +				clock-names = "t0_clk";
>   			};
>   		};
>   	};
> diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
> index 1d89110..675b04d 100644
> --- a/arch/arm/boot/dts/sama5d3_uart.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
> @@ -10,6 +10,7 @@
>   #include <dt-bindings/pinctrl/at91.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/at91/sama5d3/peripherals.h>
> +#include <dt-bindings/clk/at91/at91sam9x5/clk-peripheral.h>
>
>   / {
>   	ahb {
> @@ -32,12 +33,28 @@
>   				};
>   			};
>
> +			pmc: pmc@fffffc00 {
> +				periph: periphck {
> +					uart0_clk {
> +						atmel,clk-id = <SAMA5D3_ID_UART0>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +
> +					uart1_clk {
> +						atmel,clk-id = <SAMA5D3_ID_UART1>;
> +						atmel,clk-default-divisor = <AT91SAM9X5_PERIPH_CLK_DIV2>;
> +					};
> +				};
> +			};
> +
>   			uart0: serial@f0024000 {
>   				compatible = "atmel,at91sam9260-usart";
>   				reg = <0xf0024000 0x200>;
>   				interrupts = <SAMA5D3_ID_UART0 IRQ_TYPE_LEVEL_HIGH 5>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_uart0>;
> +				clocks = <&periph SAMA5D3_ID_UART0>;
> +				clock-names = "usart";
>   				status = "disabled";
>   			};
>
> @@ -47,6 +64,8 @@
>   				interrupts = <SAMA5D3_ID_UART1 IRQ_TYPE_LEVEL_HIGH 5>;
>   				pinctrl-names = "default";
>   				pinctrl-0 = <&pinctrl_uart1>;
> +				clocks = <&periph SAMA5D3_ID_UART1>;
> +				clock-names = "usart";
>   				status = "disabled";
>   			};
>   		};
>

... otherwise, it looks good.

Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>

-- 
Nicolas Ferre
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 4/6] ARM: at91/dt: define sama5d3xek's main clk frequency
       [not found] ` <1375954563-11343-1-git-send-email-b.brezillon@overkiz.com>
@ 2013-10-09 13:12   ` Nicolas Ferre
  0 siblings, 0 replies; 6+ messages in thread
From: Nicolas Ferre @ 2013-10-09 13:12 UTC (permalink / raw)
  To: Boris BREZILLON, Russell King, Andrew Victor,
	Jean-Christophe Plagniol-Villard, Ludovic Desroches,
	Lorenzo Pieralisi
  Cc: linux-arm-kernel, linux-kernel, devicetree

On 08/08/2013 11:36, Boris BREZILLON :
> Define the main clock frequency for the new main clock node
> in sama5d3xcm.dtsi.
>
> Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

> ---
>   arch/arm/boot/dts/sama5d3xcm.dtsi |    6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
> index 6a1871b..f19d5bf 100644
> --- a/arch/arm/boot/dts/sama5d3xcm.dtsi
> +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
> @@ -38,6 +38,12 @@
>   			macb0: ethernet@f0028000 {
>   				phy-mode = "rgmii";
>   			};
> +
> +			pmc: pmc@fffffc00 {
> +				main: mainck {
> +					clock-frequency = <12000000>;
> +				};
> +			};
>   		};
>
>   		nand0: nand@60000000 {
>


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 5/6] ARM: at91: move sama5d3 SoC to common clk
       [not found]   ` <1375957794-11559-1-git-send-email-b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>
@ 2013-10-09 13:12     ` Nicolas Ferre
  0 siblings, 0 replies; 6+ messages in thread
From: Nicolas Ferre @ 2013-10-09 13:12 UTC (permalink / raw)
  To: Boris BREZILLON, Russell King, Andrew Victor,
	Jean-Christophe Plagniol-Villard, Ludovic Desroches,
	Lorenzo Pieralisi
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA

On 08/08/2013 12:29, Boris BREZILLON :
> This patch removes the selection of AT91_USE_OLD_CLK when selecting sama5d3
> SoC support. This will enable automatically enable COMMON_CLK_AT91 option
> and add support for at91 common clk implementation.
>
> Signed-off-by: Boris BREZILLON <b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>

One big step!

Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>

> ---
>   arch/arm/mach-at91/Kconfig |    1 -
>   1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index 97033f7..b4f7d6f 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -86,7 +86,6 @@ config SOC_SAMA5D3
>   	select SOC_SAMA5
>   	select HAVE_FB_ATMEL
>   	select HAVE_AT91_DBGU1
> -	select AT91_USE_OLD_CLK
>   	select HAVE_AT91_UTMI
>   	select HAVE_AT91_SMD
>   	select HAVE_AT91_USB_CLK
>


-- 
Nicolas Ferre
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 6/6] ARM: at91/dt: remove old main clk definition from sama5d3xcm.dtsi
       [not found]   ` <1375957837-11600-1-git-send-email-b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>
@ 2013-10-09 13:14     ` Nicolas Ferre
  0 siblings, 0 replies; 6+ messages in thread
From: Nicolas Ferre @ 2013-10-09 13:14 UTC (permalink / raw)
  To: Boris BREZILLON, Russell King, Andrew Victor,
	Jean-Christophe Plagniol-Villard, Ludovic Desroches,
	Lorenzo Pieralisi
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA

On 08/08/2013 12:30, Boris BREZILLON :
> This patch removes the old main clk node which is now useless as sama5d3
> SoCs and boards are no longer compatible with the old at91 clk
> implementations.
>
> Signed-off-by: Boris BREZILLON <b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>

As said earlier, removal of old clock definitions is needed in this 
patch. You can even squash all this cleanup stuff in a single patch to 
remove all old material.

otherwise:
Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>

> ---
>   arch/arm/boot/dts/sama5d3xcm.dtsi |   11 -----------
>   1 file changed, 11 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
> index f19d5bf..81c3957 100644
> --- a/arch/arm/boot/dts/sama5d3xcm.dtsi
> +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
> @@ -18,17 +18,6 @@
>   		reg = <0x20000000 0x20000000>;
>   	};
>
> -	clocks {
> -		#address-cells = <1>;
> -		#size-cells = <1>;
> -		ranges;
> -
> -		main_clock: clock@0 {
> -			compatible = "atmel,osc", "fixed-clock";
> -			clock-frequency = <12000000>;
> -		};
> -	};
> -
>   	ahb {
>   		apb {
>   			spi0: spi@f0004000 {
>


-- 
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^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2013-10-09 13:14 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2013-10-09 13:04   ` [PATCH 1/6] ARM: at91: prepare sama5 dt boards transition to common clk Nicolas Ferre
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2013-10-09 13:05     ` [PATCH 2/6] ARM: at91: prepare common clk transition for sama5d3 SoC Nicolas Ferre
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2013-10-09 13:10     ` [PATCH 3/6] ARM: at91/dt: define sama5d3 clocks Nicolas Ferre
     [not found] ` <1375954563-11343-1-git-send-email-b.brezillon@overkiz.com>
2013-10-09 13:12   ` [PATCH 4/6] ARM: at91/dt: define sama5d3xek's main clk frequency Nicolas Ferre
     [not found] ` <1375957794-11559-1-git-send-email-b.brezillon@overkiz.com>
     [not found]   ` <1375957794-11559-1-git-send-email-b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>
2013-10-09 13:12     ` [PATCH 5/6] ARM: at91: move sama5d3 SoC to common clk Nicolas Ferre
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     [not found]   ` <1375957837-11600-1-git-send-email-b.brezillon-ZNYIgs0QAGpBDgjK7y7TUQ@public.gmane.org>
2013-10-09 13:14     ` [PATCH 6/6] ARM: at91/dt: remove old main clk definition from sama5d3xcm.dtsi Nicolas Ferre

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