[PATCH v11 0/3] DMA: Freescale: Add support for 8-channel DMA engine

[PATCH v11 0/3] DMA: Freescale: Add support for 8-channel DMA engine

[hongbo.zhang-KZfg59tc24xl57MIdRCFDg]

From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

Hi DMA and DT maintainers, please have a look at these V11 patches.

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
adds support this DMA engine.

V10->V11 changes:
- add "contains two entries" for reg description in patch [2/3]

V9->V10 changes:
- update binding description text, mainly about the reg property and also Elo3
  DMA controller specification

V8->V9 changes:
- add "Acked-by: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>" into patch [1/3]
- update reg entry <0x100300 0x4 0x100600 0x4> to two seperate ones
  <0x100300 0x4>, <0x100600 0x4> in patch [2/3]
- and also use "QorIQ Elo3 DMA" to mention previous "QorIQ DMA" in [2/3]

V7->V8 changes:
- change the word "mapping" to "specifier" for reg and interrupts description

V6->V7 changes:
- only remove unnecessary "CHIP-dma" explanations in [1/3]

V5->V6 changes:
- minor updates of descriptions in binding document and Kconfig
- remove [4/4], that should be another patch in future

V4->V5 changes:
- update description in the dt binding document, to make it more resonable
- add new patch [4/4] to eliminate a compiling warning which already exists
  for a long time

V3->V4 changes:
- introduce new patch [1/3] to revise the legacy dma binding document
- and then add new paragraph to describe new dt node binding in [2/3]
- rebase to latest kernel v3.11-rc1

V2->V3 changes:
- edit Documentation/devicetree/bindings/powerpc/fsl/dma.txt
- edit text string in Kconfig and the driver files, using "elo series" to
  mention all the current "elo*"

V1->V2 changes:
- removed the codes handling the register dgsr1, since it isn't used currently
- renamed the DMA DT compatible to "fsl,elo3-dma"
- renamed the new dts files to "elo3-dma-<n>.dtsi"

Hongbo Zhang (3):
  DMA: Freescale: revise device tree binding document
  DMA: Freescale: Add new 8-channel DMA engine device tree nodes
  DMA: Freescale: update driver to support 8-channel DMA engine

 .../devicetree/bindings/powerpc/fsl/dma.txt        |  138 ++++++++++++++------
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   82 ++++++++++++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   82 ++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
 drivers/dma/Kconfig                                |    9 +-
 drivers/dma/fsldma.c                               |    9 +-
 drivers/dma/fsldma.h                               |    2 +-
 8 files changed, 281 insertions(+), 49 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

-- 
1.7.9.5



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[PATCH v11 1/3] DMA: Freescale: revise device tree binding document

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
also fixes some defects of indent for text alignment at the same time.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
---
 .../devicetree/bindings/powerpc/fsl/dma.txt        |   68 +++++++++-----------
 1 file changed, 31 insertions(+), 37 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index 2a4b4bc..0584168 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -1,33 +1,30 @@
-* Freescale 83xx DMA Controller
+* Freescale DMA Controllers
 
-Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+** Freescale Elo DMA Controller
+   This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
+   series chips such as mpc8315, mpc8349, mpc8379 etc.
 
 Required properties:
 
-- compatible        : compatible list, contains 2 entries, first is
-		 "fsl,CHIP-dma", where CHIP is the processor
-		 (mpc8349, mpc8360, etc.) and the second is
-		 "fsl,elo-dma"
-- reg               : <registers mapping for DMA general status reg>
-- ranges		: Should be defined as specified in 1) to describe the
-		  DMA controller channels.
+- compatible        : must include "fsl,elo-dma"
+- reg               : DMA General Status Register, i.e. DGSR which contains
+                      status for all the 4 DMA channels
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
 - cell-index        : controller index.  0 for controller @ 0x8100
-- interrupts        : <interrupt mapping for DMA IRQ>
+- interrupts        : interrupt specifier for DMA IRQ
 - interrupt-parent  : optional, if needed for interrupt mapping
 
-
 - DMA channel nodes:
-        - compatible        : compatible list, contains 2 entries, first is
-			 "fsl,CHIP-dma-channel", where CHIP is the processor
-			 (mpc8349, mpc8350, etc.) and the second is
-			 "fsl,elo-dma-channel". However, see note below.
-        - reg               : <registers mapping for channel>
-        - cell-index        : dma channel index starts at 0.
+        - compatible        : must include "fsl,elo-dma-channel"
+                              However, see note below.
+        - reg               : DMA channel specific registers
+        - cell-index        : DMA channel index starts at 0.
 
 Optional properties:
-        - interrupts        : <interrupt mapping for DMA channel IRQ>
-			  (on 83xx this is expected to be identical to
-			   the interrupts property of the parent node)
+        - interrupts        : interrupt specifier for DMA channel IRQ
+                              (on 83xx this is expected to be identical to
+                              the interrupts property of the parent node)
         - interrupt-parent  : optional, if needed for interrupt mapping
 
 Example:
@@ -70,30 +67,27 @@ Example:
 		};
 	};
 
-* Freescale 85xx/86xx DMA Controller
-
-Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
+** Freescale EloPlus DMA Controller
+   This is a 4-channel DMA controller with extended addresses and chaining,
+   mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
+   mpc8540, mpc8641 p4080, bsc9131 etc.
 
 Required properties:
 
-- compatible        : compatible list, contains 2 entries, first is
-		 "fsl,CHIP-dma", where CHIP is the processor
-		 (mpc8540, mpc8540, etc.) and the second is
-		 "fsl,eloplus-dma"
-- reg               : <registers mapping for DMA general status reg>
+- compatible        : must include "fsl,eloplus-dma"
+- reg               : DMA General Status Register, i.e. DGSR which contains
+                      status for all the 4 DMA channels
 - cell-index        : controller index.  0 for controller @ 0x21000,
                                          1 for controller @ 0xc000
-- ranges		: Should be defined as specified in 1) to describe the
-		  DMA controller channels.
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
 
 - DMA channel nodes:
-        - compatible        : compatible list, contains 2 entries, first is
-			 "fsl,CHIP-dma-channel", where CHIP is the processor
-			 (mpc8540, mpc8560, etc.) and the second is
-			 "fsl,eloplus-dma-channel". However, see note below.
-        - cell-index        : dma channel index starts at 0.
-        - reg               : <registers mapping for channel>
-        - interrupts        : <interrupt mapping for DMA channel IRQ>
+        - compatible        : must include "fsl,eloplus-dma-channel"
+                              However, see note below.
+        - cell-index        : DMA channel index starts at 0.
+        - reg               : DMA channel specific registers
+        - interrupts        : interrupt specifier for DMA channel IRQ
         - interrupt-parent  : optional, if needed for interrupt mapping
 
 Example:
-- 
1.7.9.5

[PATCH v11 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 .../devicetree/bindings/powerpc/fsl/dma.txt        |   70 +++++++++++++++++
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   82 ++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   82 ++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
 5 files changed, 238 insertions(+), 4 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index 0584168..7fc1b01 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -128,6 +128,76 @@ Example:
 		};
 	};
 
+** Freescale Elo3 DMA Controller
+   DMA controller which has same function as EloPlus except that Elo3 has 8
+   channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
+   series chips, such as t1040, t4240, b4860.
+
+Required properties:
+
+- compatible        : must include "fsl,elo3-dma"
+- reg               : contains two entries for DMA General Status Registers,
+                      i.e. DGSR0 which includes status for channel 1~4, and
+                      DGSR1 for channel 5~8
+- ranges            : describes the mapping between the address space of the
+                      DMA channels and the address space of the DMA controller
+
+- DMA channel nodes:
+        - compatible        : must include "fsl,eloplus-dma-channel"
+        - reg               : DMA channel specific registers
+        - interrupts        : interrupt specifier for DMA channel IRQ
+        - interrupt-parent  : optional, if needed for interrupt mapping
+
+Example:
+dma@100300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x100300 0x4>,
+	      <0x100600 0x4>;
+	ranges = <0x0 0x100100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <28 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <29 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <30 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <31 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <76 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <77 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <78 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <79 2 0 0>;
+	};
+};
+
 Note on DMA channel compatible properties: The compatible property must say
 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
 driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 7399154..ea53ea1 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -223,13 +223,13 @@
 		reg = <0xe2000 0x1000>;
 	};
 
-/include/ "qoriq-dma-0.dtsi"
+/include/ "elo3-dma-0.dtsi"
 	dma@100300 {
 		fsl,iommu-parent = <&pamu0>;
 		fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
 	};
 
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-1.dtsi"
 	dma@101300 {
 		fsl,iommu-parent = <&pamu0>;
 		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
new file mode 100644
index 0000000..3c210e0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
@@ -0,0 +1,82 @@
+/*
+ * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma0: dma@100300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x100300 0x4>,
+	      <0x100600 0x4>;
+	ranges = <0x0 0x100100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <28 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <29 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <30 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <31 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <76 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <77 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <78 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <79 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
new file mode 100644
index 0000000..cccf3bb
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
@@ -0,0 +1,82 @@
+/*
+ * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x101000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma1: dma@101300 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,elo3-dma";
+	reg = <0x101300 0x4>,
+	      <0x101600 0x4>;
+	ranges = <0x0 0x101100 0x500>;
+	dma-channel@0 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x0 0x80>;
+		interrupts = <32 2 0 0>;
+	};
+	dma-channel@80 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x80 0x80>;
+		interrupts = <33 2 0 0>;
+	};
+	dma-channel@100 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x100 0x80>;
+		interrupts = <34 2 0 0>;
+	};
+	dma-channel@180 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x180 0x80>;
+		interrupts = <35 2 0 0>;
+	};
+	dma-channel@300 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x300 0x80>;
+		interrupts = <80 2 0 0>;
+	};
+	dma-channel@380 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x380 0x80>;
+		interrupts = <81 2 0 0>;
+	};
+	dma-channel@400 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x400 0x80>;
+		interrupts = <82 2 0 0>;
+	};
+	dma-channel@480 {
+		compatible = "fsl,eloplus-dma-channel";
+		reg = <0x480 0x80>;
+		interrupts = <83 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9..ec95c60 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -387,8 +387,8 @@
 		reg	   = <0xea000 0x4000>;
 	};
 
-/include/ "qoriq-dma-0.dtsi"
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-0.dtsi"
+/include/ "elo3-dma-1.dtsi"
 
 /include/ "qoriq-espi-0.dtsi"
 	spi@110000 {
-- 
1.7.9.5

Re: [PATCH v11 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Hongbo Zhang]

Hi Mark, Stephen and other DT maintainers?

The 1/3 had already been acked by Mark, and please have a further look 
at this patch 2/3.
The DMA maintainer Vinod  needs ack for the DT related patches so that 
he can take all this patch set.

On 09/26/2013 05:33 PM, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> the device tree nodes for them.
>
> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> ---
>   .../devicetree/bindings/powerpc/fsl/dma.txt        |   70 +++++++++++++++++
>   arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
>   arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   82 ++++++++++++++++++++
>   arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   82 ++++++++++++++++++++
>   arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
>   5 files changed, 238 insertions(+), 4 deletions(-)
>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> index 0584168..7fc1b01 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> @@ -128,6 +128,76 @@ Example:
>   		};
>   	};
>   
> +** Freescale Elo3 DMA Controller
> +   DMA controller which has same function as EloPlus except that Elo3 has 8
> +   channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
> +   series chips, such as t1040, t4240, b4860.
> +
> +Required properties:
> +
> +- compatible        : must include "fsl,elo3-dma"
> +- reg               : contains two entries for DMA General Status Registers,
> +                      i.e. DGSR0 which includes status for channel 1~4, and
> +                      DGSR1 for channel 5~8
> +- ranges            : describes the mapping between the address space of the
> +                      DMA channels and the address space of the DMA controller
> +
> +- DMA channel nodes:
> +        - compatible        : must include "fsl,eloplus-dma-channel"
> +        - reg               : DMA channel specific registers
> +        - interrupts        : interrupt specifier for DMA channel IRQ
> +        - interrupt-parent  : optional, if needed for interrupt mapping
> +
> +Example:
> +dma@100300 {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "fsl,elo3-dma";
> +	reg = <0x100300 0x4>,
> +	      <0x100600 0x4>;
> +	ranges = <0x0 0x100100 0x500>;
> +	dma-channel@0 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x0 0x80>;
> +		interrupts = <28 2 0 0>;
> +	};
> +	dma-channel@80 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x80 0x80>;
> +		interrupts = <29 2 0 0>;
> +	};
> +	dma-channel@100 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x100 0x80>;
> +		interrupts = <30 2 0 0>;
> +	};
> +	dma-channel@180 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x180 0x80>;
> +		interrupts = <31 2 0 0>;
> +	};
> +	dma-channel@300 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x300 0x80>;
> +		interrupts = <76 2 0 0>;
> +	};
> +	dma-channel@380 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x380 0x80>;
> +		interrupts = <77 2 0 0>;
> +	};
> +	dma-channel@400 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x400 0x80>;
> +		interrupts = <78 2 0 0>;
> +	};
> +	dma-channel@480 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x480 0x80>;
> +		interrupts = <79 2 0 0>;
> +	};
> +};
> +
>   Note on DMA channel compatible properties: The compatible property must say
>   "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>   driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> index 7399154..ea53ea1 100644
> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> @@ -223,13 +223,13 @@
>   		reg = <0xe2000 0x1000>;
>   	};
>   
> -/include/ "qoriq-dma-0.dtsi"
> +/include/ "elo3-dma-0.dtsi"
>   	dma@100300 {
>   		fsl,iommu-parent = <&pamu0>;
>   		fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>   	};
>   
> -/include/ "qoriq-dma-1.dtsi"
> +/include/ "elo3-dma-1.dtsi"
>   	dma@101300 {
>   		fsl,iommu-parent = <&pamu0>;
>   		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> new file mode 100644
> index 0000000..3c210e0
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> @@ -0,0 +1,82 @@
> +/*
> + * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]
> + *
> + * Copyright 2013 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *     * Redistributions of source code must retain the above copyright
> + *       notice, this list of conditions and the following disclaimer.
> + *     * Redistributions in binary form must reproduce the above copyright
> + *       notice, this list of conditions and the following disclaimer in the
> + *       documentation and/or other materials provided with the distribution.
> + *     * Neither the name of Freescale Semiconductor nor the
> + *       names of its contributors may be used to endorse or promote products
> + *       derived from this software without specific prior written permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") as published by the Free Software
> + * Foundation, either version 2 of that License or (at your option) any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +dma0: dma@100300 {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "fsl,elo3-dma";
> +	reg = <0x100300 0x4>,
> +	      <0x100600 0x4>;
> +	ranges = <0x0 0x100100 0x500>;
> +	dma-channel@0 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x0 0x80>;
> +		interrupts = <28 2 0 0>;
> +	};
> +	dma-channel@80 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x80 0x80>;
> +		interrupts = <29 2 0 0>;
> +	};
> +	dma-channel@100 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x100 0x80>;
> +		interrupts = <30 2 0 0>;
> +	};
> +	dma-channel@180 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x180 0x80>;
> +		interrupts = <31 2 0 0>;
> +	};
> +	dma-channel@300 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x300 0x80>;
> +		interrupts = <76 2 0 0>;
> +	};
> +	dma-channel@380 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x380 0x80>;
> +		interrupts = <77 2 0 0>;
> +	};
> +	dma-channel@400 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x400 0x80>;
> +		interrupts = <78 2 0 0>;
> +	};
> +	dma-channel@480 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x480 0x80>;
> +		interrupts = <79 2 0 0>;
> +	};
> +};
> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> new file mode 100644
> index 0000000..cccf3bb
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> @@ -0,0 +1,82 @@
> +/*
> + * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x101000 ]
> + *
> + * Copyright 2013 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + *     * Redistributions of source code must retain the above copyright
> + *       notice, this list of conditions and the following disclaimer.
> + *     * Redistributions in binary form must reproduce the above copyright
> + *       notice, this list of conditions and the following disclaimer in the
> + *       documentation and/or other materials provided with the distribution.
> + *     * Neither the name of Freescale Semiconductor nor the
> + *       names of its contributors may be used to endorse or promote products
> + *       derived from this software without specific prior written permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") as published by the Free Software
> + * Foundation, either version 2 of that License or (at your option) any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +dma1: dma@101300 {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "fsl,elo3-dma";
> +	reg = <0x101300 0x4>,
> +	      <0x101600 0x4>;
> +	ranges = <0x0 0x101100 0x500>;
> +	dma-channel@0 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x0 0x80>;
> +		interrupts = <32 2 0 0>;
> +	};
> +	dma-channel@80 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x80 0x80>;
> +		interrupts = <33 2 0 0>;
> +	};
> +	dma-channel@100 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x100 0x80>;
> +		interrupts = <34 2 0 0>;
> +	};
> +	dma-channel@180 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x180 0x80>;
> +		interrupts = <35 2 0 0>;
> +	};
> +	dma-channel@300 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x300 0x80>;
> +		interrupts = <80 2 0 0>;
> +	};
> +	dma-channel@380 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x380 0x80>;
> +		interrupts = <81 2 0 0>;
> +	};
> +	dma-channel@400 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x400 0x80>;
> +		interrupts = <82 2 0 0>;
> +	};
> +	dma-channel@480 {
> +		compatible = "fsl,eloplus-dma-channel";
> +		reg = <0x480 0x80>;
> +		interrupts = <83 2 0 0>;
> +	};
> +};
> diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> index bd611a9..ec95c60 100644
> --- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> @@ -387,8 +387,8 @@
>   		reg	   = <0xea000 0x4000>;
>   	};
>   
> -/include/ "qoriq-dma-0.dtsi"
> -/include/ "qoriq-dma-1.dtsi"
> +/include/ "elo3-dma-0.dtsi"
> +/include/ "elo3-dma-1.dtsi"
>   
>   /include/ "qoriq-espi-0.dtsi"
>   	spi@110000 {

Re: [PATCH v11 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Mark Rutland]

On Tue, Oct 08, 2013 at 04:22:07AM +0100, Hongbo Zhang wrote:
> Hi Mark, Stephen and other DT maintainers?
> 
> The 1/3 had already been acked by Mark, and please have a further look
> at this patch 2/3.
> The DMA maintainer Vinod  needs ack for the DT related patches so that
> he can take all this patch set.

Sorry for the delay.

This looks ok to me.

Acked-by: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>

> 
> On 09/26/2013 05:33 PM, hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org wrote:
> > From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> >
> > Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> > the device tree nodes for them.
> >
> > Signed-off-by: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > ---
> >   .../devicetree/bindings/powerpc/fsl/dma.txt        |   70 +++++++++++++++++
> >   arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
> >   arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   82 ++++++++++++++++++++
> >   arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   82 ++++++++++++++++++++
> >   arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
> >   5 files changed, 238 insertions(+), 4 deletions(-)
> >   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >   create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> >
> > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > index 0584168..7fc1b01 100644
> > --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> > @@ -128,6 +128,76 @@ Example:
> >               };
> >       };
> >
> > +** Freescale Elo3 DMA Controller
> > +   DMA controller which has same function as EloPlus except that Elo3 has 8
> > +   channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
> > +   series chips, such as t1040, t4240, b4860.
> > +
> > +Required properties:
> > +
> > +- compatible        : must include "fsl,elo3-dma"
> > +- reg               : contains two entries for DMA General Status Registers,
> > +                      i.e. DGSR0 which includes status for channel 1~4, and
> > +                      DGSR1 for channel 5~8
> > +- ranges            : describes the mapping between the address space of the
> > +                      DMA channels and the address space of the DMA controller
> > +
> > +- DMA channel nodes:
> > +        - compatible        : must include "fsl,eloplus-dma-channel"
> > +        - reg               : DMA channel specific registers
> > +        - interrupts        : interrupt specifier for DMA channel IRQ
> > +        - interrupt-parent  : optional, if needed for interrupt mapping
> > +
> > +Example:
> > +dma@100300 {
> > +     #address-cells = <1>;
> > +     #size-cells = <1>;
> > +     compatible = "fsl,elo3-dma";
> > +     reg = <0x100300 0x4>,
> > +           <0x100600 0x4>;
> > +     ranges = <0x0 0x100100 0x500>;
> > +     dma-channel@0 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x0 0x80>;
> > +             interrupts = <28 2 0 0>;
> > +     };
> > +     dma-channel@80 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x80 0x80>;
> > +             interrupts = <29 2 0 0>;
> > +     };
> > +     dma-channel@100 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x100 0x80>;
> > +             interrupts = <30 2 0 0>;
> > +     };
> > +     dma-channel@180 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x180 0x80>;
> > +             interrupts = <31 2 0 0>;
> > +     };
> > +     dma-channel@300 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x300 0x80>;
> > +             interrupts = <76 2 0 0>;
> > +     };
> > +     dma-channel@380 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x380 0x80>;
> > +             interrupts = <77 2 0 0>;
> > +     };
> > +     dma-channel@400 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x400 0x80>;
> > +             interrupts = <78 2 0 0>;
> > +     };
> > +     dma-channel@480 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x480 0x80>;
> > +             interrupts = <79 2 0 0>;
> > +     };
> > +};
> > +
> >   Note on DMA channel compatible properties: The compatible property must say
> >   "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
> >   driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
> > diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> > index 7399154..ea53ea1 100644
> > --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> > +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> > @@ -223,13 +223,13 @@
> >               reg = <0xe2000 0x1000>;
> >       };
> >
> > -/include/ "qoriq-dma-0.dtsi"
> > +/include/ "elo3-dma-0.dtsi"
> >       dma@100300 {
> >               fsl,iommu-parent = <&pamu0>;
> >               fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
> >       };
> >
> > -/include/ "qoriq-dma-1.dtsi"
> > +/include/ "elo3-dma-1.dtsi"
> >       dma@101300 {
> >               fsl,iommu-parent = <&pamu0>;
> >               fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
> > diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> > new file mode 100644
> > index 0000000..3c210e0
> > --- /dev/null
> > +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> > @@ -0,0 +1,82 @@
> > +/*
> > + * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]
> > + *
> > + * Copyright 2013 Freescale Semiconductor Inc.
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions are met:
> > + *     * Redistributions of source code must retain the above copyright
> > + *       notice, this list of conditions and the following disclaimer.
> > + *     * Redistributions in binary form must reproduce the above copyright
> > + *       notice, this list of conditions and the following disclaimer in the
> > + *       documentation and/or other materials provided with the distribution.
> > + *     * Neither the name of Freescale Semiconductor nor the
> > + *       names of its contributors may be used to endorse or promote products
> > + *       derived from this software without specific prior written permission.
> > + *
> > + *
> > + * ALTERNATIVELY, this software may be distributed under the terms of the
> > + * GNU General Public License ("GPL") as published by the Free Software
> > + * Foundation, either version 2 of that License or (at your option) any
> > + * later version.
> > + *
> > + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> > + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> > + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> > + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> > + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> > + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> > + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> > + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> > + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> > + */
> > +
> > +dma0: dma@100300 {
> > +     #address-cells = <1>;
> > +     #size-cells = <1>;
> > +     compatible = "fsl,elo3-dma";
> > +     reg = <0x100300 0x4>,
> > +           <0x100600 0x4>;
> > +     ranges = <0x0 0x100100 0x500>;
> > +     dma-channel@0 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x0 0x80>;
> > +             interrupts = <28 2 0 0>;
> > +     };
> > +     dma-channel@80 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x80 0x80>;
> > +             interrupts = <29 2 0 0>;
> > +     };
> > +     dma-channel@100 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x100 0x80>;
> > +             interrupts = <30 2 0 0>;
> > +     };
> > +     dma-channel@180 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x180 0x80>;
> > +             interrupts = <31 2 0 0>;
> > +     };
> > +     dma-channel@300 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x300 0x80>;
> > +             interrupts = <76 2 0 0>;
> > +     };
> > +     dma-channel@380 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x380 0x80>;
> > +             interrupts = <77 2 0 0>;
> > +     };
> > +     dma-channel@400 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x400 0x80>;
> > +             interrupts = <78 2 0 0>;
> > +     };
> > +     dma-channel@480 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x480 0x80>;
> > +             interrupts = <79 2 0 0>;
> > +     };
> > +};
> > diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> > new file mode 100644
> > index 0000000..cccf3bb
> > --- /dev/null
> > +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> > @@ -0,0 +1,82 @@
> > +/*
> > + * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x101000 ]
> > + *
> > + * Copyright 2013 Freescale Semiconductor Inc.
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions are met:
> > + *     * Redistributions of source code must retain the above copyright
> > + *       notice, this list of conditions and the following disclaimer.
> > + *     * Redistributions in binary form must reproduce the above copyright
> > + *       notice, this list of conditions and the following disclaimer in the
> > + *       documentation and/or other materials provided with the distribution.
> > + *     * Neither the name of Freescale Semiconductor nor the
> > + *       names of its contributors may be used to endorse or promote products
> > + *       derived from this software without specific prior written permission.
> > + *
> > + *
> > + * ALTERNATIVELY, this software may be distributed under the terms of the
> > + * GNU General Public License ("GPL") as published by the Free Software
> > + * Foundation, either version 2 of that License or (at your option) any
> > + * later version.
> > + *
> > + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> > + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> > + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> > + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> > + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> > + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> > + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> > + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> > + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> > + */
> > +
> > +dma1: dma@101300 {
> > +     #address-cells = <1>;
> > +     #size-cells = <1>;
> > +     compatible = "fsl,elo3-dma";
> > +     reg = <0x101300 0x4>,
> > +           <0x101600 0x4>;
> > +     ranges = <0x0 0x101100 0x500>;
> > +     dma-channel@0 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x0 0x80>;
> > +             interrupts = <32 2 0 0>;
> > +     };
> > +     dma-channel@80 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x80 0x80>;
> > +             interrupts = <33 2 0 0>;
> > +     };
> > +     dma-channel@100 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x100 0x80>;
> > +             interrupts = <34 2 0 0>;
> > +     };
> > +     dma-channel@180 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x180 0x80>;
> > +             interrupts = <35 2 0 0>;
> > +     };
> > +     dma-channel@300 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x300 0x80>;
> > +             interrupts = <80 2 0 0>;
> > +     };
> > +     dma-channel@380 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x380 0x80>;
> > +             interrupts = <81 2 0 0>;
> > +     };
> > +     dma-channel@400 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x400 0x80>;
> > +             interrupts = <82 2 0 0>;
> > +     };
> > +     dma-channel@480 {
> > +             compatible = "fsl,eloplus-dma-channel";
> > +             reg = <0x480 0x80>;
> > +             interrupts = <83 2 0 0>;
> > +     };
> > +};
> > diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> > index bd611a9..ec95c60 100644
> > --- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> > +++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
> > @@ -387,8 +387,8 @@
> >               reg        = <0xea000 0x4000>;
> >       };
> >
> > -/include/ "qoriq-dma-0.dtsi"
> > -/include/ "qoriq-dma-1.dtsi"
> > +/include/ "elo3-dma-0.dtsi"
> > +/include/ "elo3-dma-1.dtsi"
> >
> >   /include/ "qoriq-espi-0.dtsi"
> >       spi@110000 {
> 
> 
> 
> 
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Re: [PATCH v11 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes

[Hongbo Zhang]

On 10/15/2013 09:38 PM, Mark Rutland wrote:
> On Tue, Oct 08, 2013 at 04:22:07AM +0100, Hongbo Zhang wrote:
>> Hi Mark, Stephen and other DT maintainers?
>>
>> The 1/3 had already been acked by Mark, and please have a further look
>> at this patch 2/3.
>> The DMA maintainer Vinod  needs ack for the DT related patches so that
>> he can take all this patch set.
> Sorry for the delay.
>
> This looks ok to me.
>
> Acked-by: Mark Rutland <mark.rutland@arm.com>

Thanks, Mark.

>> On 09/26/2013 05:33 PM, hongbo.zhang@freescale.com wrote:
>>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>>
>>> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
>>> the device tree nodes for them.
>>>
>>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>>> ---
>>>    .../devicetree/bindings/powerpc/fsl/dma.txt        |   70 +++++++++++++++++
>>>    arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |    4 +-
>>>    arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi          |   82 ++++++++++++++++++++
>>>    arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi          |   82 ++++++++++++++++++++
>>>    arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |    4 +-
>>>    5 files changed, 238 insertions(+), 4 deletions(-)
>>>    create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>    create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>>>
>>> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>> index 0584168..7fc1b01 100644
>>> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>> @@ -128,6 +128,76 @@ Example:
>>>                };
>>>        };
>>>
>>> +** Freescale Elo3 DMA Controller
>>> +   DMA controller which has same function as EloPlus except that Elo3 has 8
>>> +   channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
>>> +   series chips, such as t1040, t4240, b4860.
>>> +
>>> +Required properties:
>>> +
>>> +- compatible        : must include "fsl,elo3-dma"
>>> +- reg               : contains two entries for DMA General Status Registers,
>>> +                      i.e. DGSR0 which includes status for channel 1~4, and
>>> +                      DGSR1 for channel 5~8
>>> +- ranges            : describes the mapping between the address space of the
>>> +                      DMA channels and the address space of the DMA controller
>>> +
>>> +- DMA channel nodes:
>>> +        - compatible        : must include "fsl,eloplus-dma-channel"
>>> +        - reg               : DMA channel specific registers
>>> +        - interrupts        : interrupt specifier for DMA channel IRQ
>>> +        - interrupt-parent  : optional, if needed for interrupt mapping
>>> +
>>> +Example:
>>> +dma@100300 {
>>> +     #address-cells = <1>;
>>> +     #size-cells = <1>;
>>> +     compatible = "fsl,elo3-dma";
>>> +     reg = <0x100300 0x4>,
>>> +           <0x100600 0x4>;
>>> +     ranges = <0x0 0x100100 0x500>;
>>> +     dma-channel@0 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x0 0x80>;
>>> +             interrupts = <28 2 0 0>;
>>> +     };
>>> +     dma-channel@80 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x80 0x80>;
>>> +             interrupts = <29 2 0 0>;
>>> +     };
>>> +     dma-channel@100 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x100 0x80>;
>>> +             interrupts = <30 2 0 0>;
>>> +     };
>>> +     dma-channel@180 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x180 0x80>;
>>> +             interrupts = <31 2 0 0>;
>>> +     };
>>> +     dma-channel@300 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x300 0x80>;
>>> +             interrupts = <76 2 0 0>;
>>> +     };
>>> +     dma-channel@380 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x380 0x80>;
>>> +             interrupts = <77 2 0 0>;
>>> +     };
>>> +     dma-channel@400 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x400 0x80>;
>>> +             interrupts = <78 2 0 0>;
>>> +     };
>>> +     dma-channel@480 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x480 0x80>;
>>> +             interrupts = <79 2 0 0>;
>>> +     };
>>> +};
>>> +
>>>    Note on DMA channel compatible properties: The compatible property must say
>>>    "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>>>    driver (fsldma).  Any DMA channel used by fsldma cannot be used by another
>>> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>> index 7399154..ea53ea1 100644
>>> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>> @@ -223,13 +223,13 @@
>>>                reg = <0xe2000 0x1000>;
>>>        };
>>>
>>> -/include/ "qoriq-dma-0.dtsi"
>>> +/include/ "elo3-dma-0.dtsi"
>>>        dma@100300 {
>>>                fsl,iommu-parent = <&pamu0>;
>>>                fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>>>        };
>>>
>>> -/include/ "qoriq-dma-1.dtsi"
>>> +/include/ "elo3-dma-1.dtsi"
>>>        dma@101300 {
>>>                fsl,iommu-parent = <&pamu0>;
>>>                fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
>>> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>> new file mode 100644
>>> index 0000000..3c210e0
>>> --- /dev/null
>>> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>> @@ -0,0 +1,82 @@
>>> +/*
>>> + * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]
>>> + *
>>> + * Copyright 2013 Freescale Semiconductor Inc.
>>> + *
>>> + * Redistribution and use in source and binary forms, with or without
>>> + * modification, are permitted provided that the following conditions are met:
>>> + *     * Redistributions of source code must retain the above copyright
>>> + *       notice, this list of conditions and the following disclaimer.
>>> + *     * Redistributions in binary form must reproduce the above copyright
>>> + *       notice, this list of conditions and the following disclaimer in the
>>> + *       documentation and/or other materials provided with the distribution.
>>> + *     * Neither the name of Freescale Semiconductor nor the
>>> + *       names of its contributors may be used to endorse or promote products
>>> + *       derived from this software without specific prior written permission.
>>> + *
>>> + *
>>> + * ALTERNATIVELY, this software may be distributed under the terms of the
>>> + * GNU General Public License ("GPL") as published by the Free Software
>>> + * Foundation, either version 2 of that License or (at your option) any
>>> + * later version.
>>> + *
>>> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
>>> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
>>> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
>>> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
>>> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
>>> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
>>> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
>>> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
>>> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
>>> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>>> + */
>>> +
>>> +dma0: dma@100300 {
>>> +     #address-cells = <1>;
>>> +     #size-cells = <1>;
>>> +     compatible = "fsl,elo3-dma";
>>> +     reg = <0x100300 0x4>,
>>> +           <0x100600 0x4>;
>>> +     ranges = <0x0 0x100100 0x500>;
>>> +     dma-channel@0 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x0 0x80>;
>>> +             interrupts = <28 2 0 0>;
>>> +     };
>>> +     dma-channel@80 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x80 0x80>;
>>> +             interrupts = <29 2 0 0>;
>>> +     };
>>> +     dma-channel@100 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x100 0x80>;
>>> +             interrupts = <30 2 0 0>;
>>> +     };
>>> +     dma-channel@180 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x180 0x80>;
>>> +             interrupts = <31 2 0 0>;
>>> +     };
>>> +     dma-channel@300 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x300 0x80>;
>>> +             interrupts = <76 2 0 0>;
>>> +     };
>>> +     dma-channel@380 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x380 0x80>;
>>> +             interrupts = <77 2 0 0>;
>>> +     };
>>> +     dma-channel@400 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x400 0x80>;
>>> +             interrupts = <78 2 0 0>;
>>> +     };
>>> +     dma-channel@480 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x480 0x80>;
>>> +             interrupts = <79 2 0 0>;
>>> +     };
>>> +};
>>> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>>> new file mode 100644
>>> index 0000000..cccf3bb
>>> --- /dev/null
>>> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>>> @@ -0,0 +1,82 @@
>>> +/*
>>> + * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x101000 ]
>>> + *
>>> + * Copyright 2013 Freescale Semiconductor Inc.
>>> + *
>>> + * Redistribution and use in source and binary forms, with or without
>>> + * modification, are permitted provided that the following conditions are met:
>>> + *     * Redistributions of source code must retain the above copyright
>>> + *       notice, this list of conditions and the following disclaimer.
>>> + *     * Redistributions in binary form must reproduce the above copyright
>>> + *       notice, this list of conditions and the following disclaimer in the
>>> + *       documentation and/or other materials provided with the distribution.
>>> + *     * Neither the name of Freescale Semiconductor nor the
>>> + *       names of its contributors may be used to endorse or promote products
>>> + *       derived from this software without specific prior written permission.
>>> + *
>>> + *
>>> + * ALTERNATIVELY, this software may be distributed under the terms of the
>>> + * GNU General Public License ("GPL") as published by the Free Software
>>> + * Foundation, either version 2 of that License or (at your option) any
>>> + * later version.
>>> + *
>>> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
>>> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
>>> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
>>> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
>>> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
>>> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
>>> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
>>> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
>>> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
>>> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>>> + */
>>> +
>>> +dma1: dma@101300 {
>>> +     #address-cells = <1>;
>>> +     #size-cells = <1>;
>>> +     compatible = "fsl,elo3-dma";
>>> +     reg = <0x101300 0x4>,
>>> +           <0x101600 0x4>;
>>> +     ranges = <0x0 0x101100 0x500>;
>>> +     dma-channel@0 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x0 0x80>;
>>> +             interrupts = <32 2 0 0>;
>>> +     };
>>> +     dma-channel@80 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x80 0x80>;
>>> +             interrupts = <33 2 0 0>;
>>> +     };
>>> +     dma-channel@100 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x100 0x80>;
>>> +             interrupts = <34 2 0 0>;
>>> +     };
>>> +     dma-channel@180 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x180 0x80>;
>>> +             interrupts = <35 2 0 0>;
>>> +     };
>>> +     dma-channel@300 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x300 0x80>;
>>> +             interrupts = <80 2 0 0>;
>>> +     };
>>> +     dma-channel@380 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x380 0x80>;
>>> +             interrupts = <81 2 0 0>;
>>> +     };
>>> +     dma-channel@400 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x400 0x80>;
>>> +             interrupts = <82 2 0 0>;
>>> +     };
>>> +     dma-channel@480 {
>>> +             compatible = "fsl,eloplus-dma-channel";
>>> +             reg = <0x480 0x80>;
>>> +             interrupts = <83 2 0 0>;
>>> +     };
>>> +};
>>> diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
>>> index bd611a9..ec95c60 100644
>>> --- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
>>> +++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
>>> @@ -387,8 +387,8 @@
>>>                reg        = <0xea000 0x4000>;
>>>        };
>>>
>>> -/include/ "qoriq-dma-0.dtsi"
>>> -/include/ "qoriq-dma-1.dtsi"
>>> +/include/ "elo3-dma-0.dtsi"
>>> +/include/ "elo3-dma-1.dtsi"
>>>
>>>    /include/ "qoriq-espi-0.dtsi"
>>>        spi@110000 {
>>
>>
>>

[PATCH v11 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[hongbo.zhang]

From: Hongbo Zhang <hongbo.zhang@freescale.com>

This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
 drivers/dma/Kconfig  |    9 +++++----
 drivers/dma/fsldma.c |    9 ++++++---
 drivers/dma/fsldma.h |    2 +-
 3 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6825957..3979c65 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -89,14 +89,15 @@ config AT_HDMAC
 	  Support the Atmel AHB DMA controller.
 
 config FSL_DMA
-	tristate "Freescale Elo and Elo Plus DMA support"
+	tristate "Freescale Elo series DMA support"
 	depends on FSL_SOC
 	select DMA_ENGINE
 	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
 	---help---
-	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
-	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
-	  Elo Plus is the DMA controller on 85xx and 86xx parts.
+	  Enable support for the Freescale Elo series DMA controllers.
+	  The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
+	  EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
+	  some Txxx and Bxxx parts.
 
 config MPC512X_DMA
 	tristate "Freescale MPC512x built-in DMA engine support"
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 49e8fbd..16a9a48 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev,
 	WARN_ON(fdev->feature != chan->feature);
 
 	chan->dev = fdev->dev;
-	chan->id = ((res.start - 0x100) & 0xfff) >> 7;
+	chan->id = (res.start & 0xfff) < 0x300 ?
+		   ((res.start - 0x100) & 0xfff) >> 7 :
+		   ((res.start - 0x200) & 0xfff) >> 7;
 	if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
 		dev_err(fdev->dev, "too many channels for device\n");
 		err = -EINVAL;
@@ -1434,6 +1436,7 @@ static int fsldma_of_remove(struct platform_device *op)
 }
 
 static const struct of_device_id fsldma_of_ids[] = {
+	{ .compatible = "fsl,elo3-dma", },
 	{ .compatible = "fsl,eloplus-dma", },
 	{ .compatible = "fsl,elo-dma", },
 	{}
@@ -1455,7 +1458,7 @@ static struct platform_driver fsldma_of_driver = {
 
 static __init int fsldma_init(void)
 {
-	pr_info("Freescale Elo / Elo Plus DMA driver\n");
+	pr_info("Freescale Elo series DMA driver\n");
 	return platform_driver_register(&fsldma_of_driver);
 }
 
@@ -1467,5 +1470,5 @@ static void __exit fsldma_exit(void)
 subsys_initcall(fsldma_init);
 module_exit(fsldma_exit);
 
-MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver");
+MODULE_DESCRIPTION("Freescale Elo series DMA driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index f5c3879..1ffc244 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -112,7 +112,7 @@ struct fsldma_chan_regs {
 };
 
 struct fsldma_chan;
-#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
+#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
 
 struct fsldma_device {
 	void __iomem *regs;	/* DGSR register base */
-- 
1.7.9.5

Re: [PATCH v11 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[Hongbo Zhang]

Hi Vinod,
I have gotten ACK from Mark for both the 1/3 and 2/3 patches.
Thanks.


On 09/26/2013 05:33 PM, hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org wrote:
> From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>
> This patch adds support to 8-channel DMA engine, thus the driver works for both
> the new 8-channel and the legacy 4-channel DMA engines.
>
> Signed-off-by: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
>   drivers/dma/Kconfig  |    9 +++++----
>   drivers/dma/fsldma.c |    9 ++++++---
>   drivers/dma/fsldma.h |    2 +-
>   3 files changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> index 6825957..3979c65 100644
> --- a/drivers/dma/Kconfig
> +++ b/drivers/dma/Kconfig
> @@ -89,14 +89,15 @@ config AT_HDMAC
>   	  Support the Atmel AHB DMA controller.
>   
>   config FSL_DMA
> -	tristate "Freescale Elo and Elo Plus DMA support"
> +	tristate "Freescale Elo series DMA support"
>   	depends on FSL_SOC
>   	select DMA_ENGINE
>   	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
>   	---help---
> -	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
> -	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
> -	  Elo Plus is the DMA controller on 85xx and 86xx parts.
> +	  Enable support for the Freescale Elo series DMA controllers.
> +	  The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
> +	  EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
> +	  some Txxx and Bxxx parts.
>   
>   config MPC512X_DMA
>   	tristate "Freescale MPC512x built-in DMA engine support"
> diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
> index 49e8fbd..16a9a48 100644
> --- a/drivers/dma/fsldma.c
> +++ b/drivers/dma/fsldma.c
> @@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev,
>   	WARN_ON(fdev->feature != chan->feature);
>   
>   	chan->dev = fdev->dev;
> -	chan->id = ((res.start - 0x100) & 0xfff) >> 7;
> +	chan->id = (res.start & 0xfff) < 0x300 ?
> +		   ((res.start - 0x100) & 0xfff) >> 7 :
> +		   ((res.start - 0x200) & 0xfff) >> 7;
>   	if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
>   		dev_err(fdev->dev, "too many channels for device\n");
>   		err = -EINVAL;
> @@ -1434,6 +1436,7 @@ static int fsldma_of_remove(struct platform_device *op)
>   }
>   
>   static const struct of_device_id fsldma_of_ids[] = {
> +	{ .compatible = "fsl,elo3-dma", },
>   	{ .compatible = "fsl,eloplus-dma", },
>   	{ .compatible = "fsl,elo-dma", },
>   	{}
> @@ -1455,7 +1458,7 @@ static struct platform_driver fsldma_of_driver = {
>   
>   static __init int fsldma_init(void)
>   {
> -	pr_info("Freescale Elo / Elo Plus DMA driver\n");
> +	pr_info("Freescale Elo series DMA driver\n");
>   	return platform_driver_register(&fsldma_of_driver);
>   }
>   
> @@ -1467,5 +1470,5 @@ static void __exit fsldma_exit(void)
>   subsys_initcall(fsldma_init);
>   module_exit(fsldma_exit);
>   
> -MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver");
> +MODULE_DESCRIPTION("Freescale Elo series DMA driver");
>   MODULE_LICENSE("GPL");
> diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
> index f5c3879..1ffc244 100644
> --- a/drivers/dma/fsldma.h
> +++ b/drivers/dma/fsldma.h
> @@ -112,7 +112,7 @@ struct fsldma_chan_regs {
>   };
>   
>   struct fsldma_chan;
> -#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
> +#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
>   
>   struct fsldma_device {
>   	void __iomem *regs;	/* DGSR register base */



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Re: [PATCH v11 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[Hongbo Zhang]

Hi Vinod Koul and Dan Williams,
Ping?


On 10/17/2013 01:56 PM, Hongbo Zhang wrote:
> Hi Vinod,
> I have gotten ACK from Mark for both the 1/3 and 2/3 patches.
> Thanks.
>
>
> On 09/26/2013 05:33 PM, hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org wrote:
>> From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>
>> This patch adds support to 8-channel DMA engine, thus the driver 
>> works for both
>> the new 8-channel and the legacy 4-channel DMA engines.
>>
>> Signed-off-by: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>> ---
>>   drivers/dma/Kconfig  |    9 +++++----
>>   drivers/dma/fsldma.c |    9 ++++++---
>>   drivers/dma/fsldma.h |    2 +-
>>   3 files changed, 12 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
>> index 6825957..3979c65 100644
>> --- a/drivers/dma/Kconfig
>> +++ b/drivers/dma/Kconfig
>> @@ -89,14 +89,15 @@ config AT_HDMAC
>>         Support the Atmel AHB DMA controller.
>>     config FSL_DMA
>> -    tristate "Freescale Elo and Elo Plus DMA support"
>> +    tristate "Freescale Elo series DMA support"
>>       depends on FSL_SOC
>>       select DMA_ENGINE
>>       select ASYNC_TX_ENABLE_CHANNEL_SWITCH
>>       ---help---
>> -      Enable support for the Freescale Elo and Elo Plus DMA 
>> controllers.
>> -      The Elo is the DMA controller on some 82xx and 83xx parts, and 
>> the
>> -      Elo Plus is the DMA controller on 85xx and 86xx parts.
>> +      Enable support for the Freescale Elo series DMA controllers.
>> +      The Elo is the DMA controller on some mpc82xx and mpc83xx 
>> parts, the
>> +      EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 
>> is on
>> +      some Txxx and Bxxx parts.
>>     config MPC512X_DMA
>>       tristate "Freescale MPC512x built-in DMA engine support"
>> diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
>> index 49e8fbd..16a9a48 100644
>> --- a/drivers/dma/fsldma.c
>> +++ b/drivers/dma/fsldma.c
>> @@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct 
>> fsldma_device *fdev,
>>       WARN_ON(fdev->feature != chan->feature);
>>         chan->dev = fdev->dev;
>> -    chan->id = ((res.start - 0x100) & 0xfff) >> 7;
>> +    chan->id = (res.start & 0xfff) < 0x300 ?
>> +           ((res.start - 0x100) & 0xfff) >> 7 :
>> +           ((res.start - 0x200) & 0xfff) >> 7;
>>       if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
>>           dev_err(fdev->dev, "too many channels for device\n");
>>           err = -EINVAL;
>> @@ -1434,6 +1436,7 @@ static int fsldma_of_remove(struct 
>> platform_device *op)
>>   }
>>     static const struct of_device_id fsldma_of_ids[] = {
>> +    { .compatible = "fsl,elo3-dma", },
>>       { .compatible = "fsl,eloplus-dma", },
>>       { .compatible = "fsl,elo-dma", },
>>       {}
>> @@ -1455,7 +1458,7 @@ static struct platform_driver fsldma_of_driver = {
>>     static __init int fsldma_init(void)
>>   {
>> -    pr_info("Freescale Elo / Elo Plus DMA driver\n");
>> +    pr_info("Freescale Elo series DMA driver\n");
>>       return platform_driver_register(&fsldma_of_driver);
>>   }
>>   @@ -1467,5 +1470,5 @@ static void __exit fsldma_exit(void)
>>   subsys_initcall(fsldma_init);
>>   module_exit(fsldma_exit);
>>   -MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver");
>> +MODULE_DESCRIPTION("Freescale Elo series DMA driver");
>>   MODULE_LICENSE("GPL");
>> diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
>> index f5c3879..1ffc244 100644
>> --- a/drivers/dma/fsldma.h
>> +++ b/drivers/dma/fsldma.h
>> @@ -112,7 +112,7 @@ struct fsldma_chan_regs {
>>   };
>>     struct fsldma_chan;
>> -#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
>> +#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
>>     struct fsldma_device {
>>       void __iomem *regs;    /* DGSR register base */
>
>



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Re: [PATCH v11 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[Dan Williams]

On Mon, Nov 4, 2013 at 6:31 PM, Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
> Hi Vinod Koul and Dan Williams,
> Ping?
>

Not much to review from the dmaengine side, just one question below.
It would be helpful if you can send these to the new dmaengine
patchwork at dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org with the Acks you have already
collected.

>
>
> On 10/17/2013 01:56 PM, Hongbo Zhang wrote:
>>
>> Hi Vinod,
>> I have gotten ACK from Mark for both the 1/3 and 2/3 patches.
>> Thanks.
>>
>>
>> On 09/26/2013 05:33 PM, hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org wrote:
>>>
>>> From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>>
>>> This patch adds support to 8-channel DMA engine, thus the driver works
>>> for both
>>> the new 8-channel and the legacy 4-channel DMA engines.
>>>
>>> Signed-off-by: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>> ---
>>>   drivers/dma/Kconfig  |    9 +++++----
>>>   drivers/dma/fsldma.c |    9 ++++++---
>>>   drivers/dma/fsldma.h |    2 +-
>>>   3 files changed, 12 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
>>> index 6825957..3979c65 100644
>>> --- a/drivers/dma/Kconfig
>>> +++ b/drivers/dma/Kconfig
>>> @@ -89,14 +89,15 @@ config AT_HDMAC
>>>         Support the Atmel AHB DMA controller.
>>>     config FSL_DMA
>>> -    tristate "Freescale Elo and Elo Plus DMA support"
>>> +    tristate "Freescale Elo series DMA support"
>>>       depends on FSL_SOC
>>>       select DMA_ENGINE
>>>       select ASYNC_TX_ENABLE_CHANNEL_SWITCH
>>>       ---help---
>>> -      Enable support for the Freescale Elo and Elo Plus DMA controllers.
>>> -      The Elo is the DMA controller on some 82xx and 83xx parts, and the
>>> -      Elo Plus is the DMA controller on 85xx and 86xx parts.
>>> +      Enable support for the Freescale Elo series DMA controllers.
>>> +      The Elo is the DMA controller on some mpc82xx and mpc83xx parts,
>>> the
>>> +      EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is
>>> on
>>> +      some Txxx and Bxxx parts.
>>>     config MPC512X_DMA
>>>       tristate "Freescale MPC512x built-in DMA engine support"
>>> diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
>>> index 49e8fbd..16a9a48 100644
>>> --- a/drivers/dma/fsldma.c
>>> +++ b/drivers/dma/fsldma.c
>>> @@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device
>>> *fdev,
>>>       WARN_ON(fdev->feature != chan->feature);
>>>         chan->dev = fdev->dev;
>>> -    chan->id = ((res.start - 0x100) & 0xfff) >> 7;
>>> +    chan->id = (res.start & 0xfff) < 0x300 ?
>>> +           ((res.start - 0x100) & 0xfff) >> 7 :
>>> +           ((res.start - 0x200) & 0xfff) >> 7;
>>>       if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {

Isn't it a bit fragile to have this based on the resource address?
Can't device tree tell you the channel id directly by an index into
the "dma0: dma@100300" node?

--
Dan
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Re: [PATCH v11 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[Hongbo Zhang]

On 11/08/2013 10:45 AM, Dan Williams wrote:
> On Mon, Nov 4, 2013 at 6:31 PM, Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
>> Hi Vinod Koul and Dan Williams,
>> Ping?
>>
> Not much to review from the dmaengine side, just one question below.
> It would be helpful if you can send these to the new dmaengine
> patchwork at dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org with the Acks you have already
> collected.
>

Sorry didn't notice this new mailing list.
I will resend these patches to it again.

>>
>> On 10/17/2013 01:56 PM, Hongbo Zhang wrote:
>>> Hi Vinod,
>>> I have gotten ACK from Mark for both the 1/3 and 2/3 patches.
>>> Thanks.
>>>
>>>
>>> On 09/26/2013 05:33 PM, hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org wrote:
>>>> From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>>>
>>>> This patch adds support to 8-channel DMA engine, thus the driver works
>>>> for both
>>>> the new 8-channel and the legacy 4-channel DMA engines.
>>>>
>>>> Signed-off-by: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>>> ---
>>>>    drivers/dma/Kconfig  |    9 +++++----
>>>>    drivers/dma/fsldma.c |    9 ++++++---
>>>>    drivers/dma/fsldma.h |    2 +-
>>>>    3 files changed, 12 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
>>>> index 6825957..3979c65 100644
>>>> --- a/drivers/dma/Kconfig
>>>> +++ b/drivers/dma/Kconfig
>>>> @@ -89,14 +89,15 @@ config AT_HDMAC
>>>>          Support the Atmel AHB DMA controller.
>>>>      config FSL_DMA
>>>> -    tristate "Freescale Elo and Elo Plus DMA support"
>>>> +    tristate "Freescale Elo series DMA support"
>>>>        depends on FSL_SOC
>>>>        select DMA_ENGINE
>>>>        select ASYNC_TX_ENABLE_CHANNEL_SWITCH
>>>>        ---help---
>>>> -      Enable support for the Freescale Elo and Elo Plus DMA controllers.
>>>> -      The Elo is the DMA controller on some 82xx and 83xx parts, and the
>>>> -      Elo Plus is the DMA controller on 85xx and 86xx parts.
>>>> +      Enable support for the Freescale Elo series DMA controllers.
>>>> +      The Elo is the DMA controller on some mpc82xx and mpc83xx parts,
>>>> the
>>>> +      EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is
>>>> on
>>>> +      some Txxx and Bxxx parts.
>>>>      config MPC512X_DMA
>>>>        tristate "Freescale MPC512x built-in DMA engine support"
>>>> diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
>>>> index 49e8fbd..16a9a48 100644
>>>> --- a/drivers/dma/fsldma.c
>>>> +++ b/drivers/dma/fsldma.c
>>>> @@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device
>>>> *fdev,
>>>>        WARN_ON(fdev->feature != chan->feature);
>>>>          chan->dev = fdev->dev;
>>>> -    chan->id = ((res.start - 0x100) & 0xfff) >> 7;
>>>> +    chan->id = (res.start & 0xfff) < 0x300 ?
>>>> +           ((res.start - 0x100) & 0xfff) >> 7 :
>>>> +           ((res.start - 0x200) & 0xfff) >> 7;
>>>>        if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
> Isn't it a bit fragile to have this based on the resource address?
> Can't device tree tell you the channel id directly by an index into
> the "dma0: dma@100300" node?

Yes, both this way and putting a "cell-index" into device tree work.
This won't be fragile, because the resource address should always be 
defined correctly, otherwise even if we can tell a channel id by 
"cell-index" but with wrong resource address, nothing will work.
This piece of code only doesn't seem as neat as using "cell-index", but 
we prefer the style that let the device tree describes as true as what 
hardware really has. This doesn't mean "cell-index" isn't acceptable, if 
it is necessary and unavoidable, we can send another patch to add it, 
but currently there is no need and we don't have to do this.

> --
> Dan
>



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Re: [PATCH v11 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[Dan Williams]

On Mon, Nov 11, 2013 at 1:12 AM, Hongbo Zhang
<hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
>>>>> diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
>>>>> index 49e8fbd..16a9a48 100644
>>>>> --- a/drivers/dma/fsldma.c
>>>>> +++ b/drivers/dma/fsldma.c
>>>>> @@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct
>>>>> fsldma_device
>>>>> *fdev,
>>>>>        WARN_ON(fdev->feature != chan->feature);
>>>>>          chan->dev = fdev->dev;
>>>>> -    chan->id = ((res.start - 0x100) & 0xfff) >> 7;
>>>>> +    chan->id = (res.start & 0xfff) < 0x300 ?
>>>>> +           ((res.start - 0x100) & 0xfff) >> 7 :
>>>>> +           ((res.start - 0x200) & 0xfff) >> 7;
>>>>>        if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
>>
>> Isn't it a bit fragile to have this based on the resource address?
>> Can't device tree tell you the channel id directly by an index into
>> the "dma0: dma@100300" node?
>
>
> Yes, both this way and putting a "cell-index" into device tree work.
> This won't be fragile, because the resource address should always be defined
> correctly, otherwise even if we can tell a channel id by "cell-index" but
> with wrong resource address, nothing will work.
> This piece of code only doesn't seem as neat as using "cell-index", but we
> prefer the style that let the device tree describes as true as what hardware
> really has. This doesn't mean "cell-index" isn't acceptable, if it is
> necessary and unavoidable, we can send another patch to add it, but
> currently there is no need and we don't have to do this.
>

I'm pointing it out because we just had a bug fix to another driver
motivated by the fact that resource addresses may move from one
implementation to another, whereas the cell index provided by device
tree is static.  Just a note, no need to fix it now.

--
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Re: [PATCH v11 3/3] DMA: Freescale: update driver to support 8-channel DMA engine

[Hongbo Zhang]

On 11/12/2013 08:09 AM, Dan Williams wrote:
> On Mon, Nov 11, 2013 at 1:12 AM, Hongbo Zhang
> <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
>>>>>> diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
>>>>>> index 49e8fbd..16a9a48 100644
>>>>>> --- a/drivers/dma/fsldma.c
>>>>>> +++ b/drivers/dma/fsldma.c
>>>>>> @@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct
>>>>>> fsldma_device
>>>>>> *fdev,
>>>>>>         WARN_ON(fdev->feature != chan->feature);
>>>>>>           chan->dev = fdev->dev;
>>>>>> -    chan->id = ((res.start - 0x100) & 0xfff) >> 7;
>>>>>> +    chan->id = (res.start & 0xfff) < 0x300 ?
>>>>>> +           ((res.start - 0x100) & 0xfff) >> 7 :
>>>>>> +           ((res.start - 0x200) & 0xfff) >> 7;
>>>>>>         if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
>>> Isn't it a bit fragile to have this based on the resource address?
>>> Can't device tree tell you the channel id directly by an index into
>>> the "dma0: dma@100300" node?
>>
>> Yes, both this way and putting a "cell-index" into device tree work.
>> This won't be fragile, because the resource address should always be defined
>> correctly, otherwise even if we can tell a channel id by "cell-index" but
>> with wrong resource address, nothing will work.
>> This piece of code only doesn't seem as neat as using "cell-index", but we
>> prefer the style that let the device tree describes as true as what hardware
>> really has. This doesn't mean "cell-index" isn't acceptable, if it is
>> necessary and unavoidable, we can send another patch to add it, but
>> currently there is no need and we don't have to do this.
>>
> I'm pointing it out because we just had a bug fix to another driver
> motivated by the fact that resource addresses may move from one
> implementation to another, whereas the cell index provided by device
> tree is static.  Just a note, no need to fix it now.

Get it, and will remember it, thank you Dan.
> --
> Dan
>



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Re: [PATCH v11 0/3] DMA: Freescale: Add support for 8-channel DMA engine

[Vinod Koul]

On Thu, Sep 26, 2013 at 05:33:40PM +0800, hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org wrote:
> From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> 
> Hi DMA and DT maintainers, please have a look at these V11 patches.
> 
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
> adds support this DMA engine.
> 
Applied all

Thanks
~Vinod
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Re: [PATCH v11 0/3] DMA: Freescale: Add support for 8-channel DMA engine

[Hongbo Zhang]

On 11/13/2013 04:57 PM, Vinod Koul wrote:
> On Thu, Sep 26, 2013 at 05:33:40PM +0800, hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org wrote:
>> From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>
>> Hi DMA and DT maintainers, please have a look at these V11 patches.
>>
>> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
>> adds support this DMA engine.
>>
> Applied all

Thanks.

> Thanks
> ~Vinod
>



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