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[71.163.245.5]) by smtp.gmail.com with ESMTPSA id y9sm17232696qkm.19.2021.03.17.07.25.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 Mar 2021 07:25:59 -0700 (PDT) Subject: Re: [PATCH 2/8] dt-bindings: crypto : Add new compatible strings for qcom-qce To: Bhupesh Sharma , Rob Herring Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com References: <20210310052503.3618486-1-bhupesh.sharma@linaro.org> <20210310052503.3618486-3-bhupesh.sharma@linaro.org> <20210316222825.GA3792517@robh.at.kernel.org> From: Thara Gopinath Message-ID: <525bea31-b377-6f64-5cc2-827c738df372@linaro.org> Date: Wed, 17 Mar 2021 10:25:58 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 3/17/21 9:20 AM, Bhupesh Sharma wrote: > Hi Rob, > > Thanks for your review. > > On Wed, 17 Mar 2021 at 03:58, Rob Herring wrote: >> >> On Wed, Mar 10, 2021 at 10:54:57AM +0530, Bhupesh Sharma wrote: >>> Newer qcom chips support newer versions of the qce IP, so add >>> new compatible strings for qcom-qce (in addition to the existing >>> "qcom,crypto-v5.1"). >>> >>> With [1], Thara tried to add the support for new compatible strings, >>> but we couldn't conclude on the approach to be used. Since we have >>> a number of new qcom arm64 SoCs available now, several of which >>> support the same crypto IP version, so it makes more sense to use >>> the IP version for the compatible string, rather than using the soc >>> name as the compatible string. >>> >>> [1]. https://lore.kernel.org/linux-arm-msm/20201119155233.3974286-7-thara.gopinath@linaro.org/ >>> >>> Cc: Thara Gopinath >>> Cc: Bjorn Andersson >>> Cc: Rob Herring >>> Cc: Andy Gross >>> Cc: Herbert Xu >>> Cc: David S. Miller >>> Cc: Stephen Boyd >>> Cc: Michael Turquette >>> Cc: linux-clk@vger.kernel.org >>> Cc: linux-crypto@vger.kernel.org >>> Cc: devicetree@vger.kernel.org >>> Cc: linux-kernel@vger.kernel.org >>> Cc: bhupesh.linux@gmail.com >>> Signed-off-by: Bhupesh Sharma >>> --- >>> Documentation/devicetree/bindings/crypto/qcom-qce.txt | 6 +++++- >>> 1 file changed, 5 insertions(+), 1 deletion(-) >>> >>> diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.txt b/Documentation/devicetree/bindings/crypto/qcom-qce.txt >>> index 07ee1b12000b..217b37dbd58a 100644 >>> --- a/Documentation/devicetree/bindings/crypto/qcom-qce.txt >>> +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.txt >>> @@ -2,7 +2,11 @@ Qualcomm crypto engine driver >>> >>> Required properties: >>> >>> -- compatible : should be "qcom,crypto-v5.1" >>> +- compatible : Supported versions are: >>> + - "qcom,crypto-v5.1", for ipq6018 >>> + - "qcom,crypto-v5.4", for sdm845, sm8150 >> >> 2 SoCs sharing 1 version doesn't convince me on using version numbers. >> Having 4 versions for 5 SoCs further convinces me you should stick with >> SoC specific compatibles as *everyone* else does (including most QCom >> bindings). Hi! So, it is 2 SoCs today. But we do have a bunch of SoCs for each version and these could be added in future. I think I have asked this question before as well,how about "qcom,sdm845-crypto", "qcom,crypto-v5.4" and have only "qcom,crypto-" in the driver ? I see this being done by some Qcom bindings. > Fair enough. I will add SoC specific compatibles in v2, which should > be out shortly. > > Regards, > Bhupesh > >>> + - "qcom,crypto-v5.5", for sm8250 >>> + - "qcom,crypto-v5.6", for sm8350 >>> - reg : specifies base physical address and size of the registers map >>> - clocks : phandle to clock-controller plus clock-specifier pair >>> - clock-names : "iface" clocks register interface >>> -- >>> 2.29.2 >>> -- Warm Regards Thara