From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCHv3 05/19] ARM: dt: tegra114: iommu: Fix IOMMU register address Date: Wed, 30 Oct 2013 16:07:17 -0600 Message-ID: <52718315.1040307@wwwdotorg.org> References: <1382092020-13170-1-git-send-email-hdoyu@nvidia.com> <1382092020-13170-6-git-send-email-hdoyu@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1382092020-13170-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Hiroshi Doyu , Joerg Roedel , Stephen Warren , Grant Likely , Rob Herring Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On 10/18/2013 04:26 AM, Hiroshi Doyu wrote: > Fix IOMMU register address. That's quite unfortunate. Why do we always have trouble getting the IOMMU register address correct in DT; I think we had a similar issue with the Tegra30 DT. Anyway, I guess I should take this for 3.13 and stable since it's a bugfix.