From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCHv4 5/7] iommu/tegra: smmu: Support "mmu-masters" binding
Date: Tue, 12 Nov 2013 17:17:22 -0700 [thread overview]
Message-ID: <5282C512.5090900@wwwdotorg.org> (raw)
In-Reply-To: <1384158718-4756-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 11/11/2013 01:31 AM, Hiroshi Doyu wrote:
> Follow arm,smmu's "mmu-masters" binding.
> diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt b/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt
> +- mmu-masters : A list of phandles to device nodes representing bus
> + masters for which the SMMU can provide a translation
> + and their corresponding StreamIDs (see example below).
> + Each device node linked from this list must have a
> + "#stream-id-cells" property, indicating the number of
> + StreamIDs(swgroup ID) associated with it, which is defined
> + in "include/dt-bindings/memory/tegra-swgroup.h".
Some of those lines are indented with TABs, others with spaces.
> + mmu-masters = <&host1x TEGRA_SWGROUP_HC>,
> + <&mpe TEGRA_SWGROUP_MPE>,
> + <&vi TEGRA_SWGROUP_VI>,
> + <&epp TEGRA_SWGROUP_EPP>,
> + <&isp TEGRA_SWGROUP_ISP>,
> + <&gr2d TEGRA_SWGROUP_G2>,
> + <&gr3d TEGRA_SWGROUP_NV TEGRA_SWGROUP_NV2>,
So right now, the driver is statically assigning clients to a couple of
specific ASIDs. What if we want to configure that mapping from DT; does
that make sense? Instead of mmu-masters being a list of <phandle
streamid*>, should it be <phandle ASID streamid*> or <phandle (streamid
ASID)*>?
> diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
> struct smmu_client {
...
> - u32 hwgrp;
> + u64 hwgrp;
I think that's used later with for_each_set_bit() etc. Should it be
declared as an explicit bitmap object, or at least an unsigned long to
directly match the bitmap APIs?
Related, what if someone bumps <dt-bindings/memory/tegra-swgroup.h>'s
TEGRA_SWGROUP_MAX to 96 without changing the code?
> static int smmu_iommu_attach_dev(struct iommu_domain *domain,
> struct device *dev)
...
> - client = devm_kzalloc(smmu->dev, sizeof(*c), GFP_KERNEL);
> + client = find_smmu_client(smmu, dev->of_node);
> if (!client)
... (deletions of replaced code)
> return -EINVAL;
-ENODEV cursorily sounds better? Same in smmu_iommu_add_device().
> @@ -1238,6 +1311,23 @@ static int tegra_smmu_probe(struct platform_device *pdev)
> + i = 0;
> + smmu->clients = RB_ROOT;
> + while (true) {
> + err = of_parse_phandle_with_args(dev->of_node, "mmu-masters",
> + "#stream-id-cells", i, &args);
> + if (err)
> + break;
An iterator macro similar to of_property_for_each_u32/string() might be
nicer, which could replace all that with:
of_property_for_each_phandle_with_args(dev->of_node, "mmu-masters",
"#stream-id-cells") {
next prev parent reply other threads:[~2013-11-13 0:17 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-11 8:31 [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Hiroshi Doyu
[not found] ` <1384158718-4756-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-11 8:31 ` [PATCHv4 1/7] ARM: tegra: Create a DT header defining SWGROUP ID Hiroshi Doyu
[not found] ` <1384158718-4756-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-12 22:48 ` Stephen Warren
[not found] ` <5282B036.9090604-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-15 10:29 ` Hiroshi Doyu
[not found] ` <20131115122926.9166a6693bb9378a7f2c1526-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-15 16:44 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 2/7] driver/core: Populate IOMMU'able devices in order Hiroshi Doyu
[not found] ` <1384158718-4756-3-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-11 11:39 ` Will Deacon
[not found] ` <20131111113936.GH28302-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-11-12 23:30 ` Stephen Warren
2013-11-12 23:34 ` Stephen Warren
[not found] ` <5282BAFC.8070405-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-13 7:23 ` Hiroshi Doyu
[not found] ` <20131113092354.5b65f29bacc4f37083f81e2e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 17:49 ` Stephen Warren
2013-11-13 14:38 ` Will Deacon
[not found] ` <20131113143804.GA11928-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-11-13 16:06 ` Hiroshi Doyu
[not found] ` <20131113.180610.823304139654159769.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 17:31 ` Will Deacon
[not found] ` <20131113173142.GF11928-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-11-13 17:53 ` Stephen Warren
[not found] ` <5283BCA0.40300-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-14 16:16 ` Will Deacon
2013-11-13 17:45 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 3/7] iommu/tegra: smmu: Register IOMMU'able devices dynamically Hiroshi Doyu
[not found] ` <1384158718-4756-4-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-12 23:53 ` Stephen Warren
2013-11-12 23:58 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 4/7] iommu/tegra: smmu: Calculate ASID register offset by ID Hiroshi Doyu
[not found] ` <1384158718-4756-5-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 0:02 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 5/7] iommu/tegra: smmu: Support "mmu-masters" binding Hiroshi Doyu
[not found] ` <1384158718-4756-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-11 11:35 ` Will Deacon
[not found] ` <20131111113510.GG28302-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-11-11 12:03 ` Hiroshi Doyu
2013-11-13 0:17 ` Stephen Warren [this message]
[not found] ` <5282C512.5090900-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-13 7:45 ` Hiroshi Doyu
[not found] ` <20131113094517.4608edf4302b61e3c4402a25-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 17:58 ` Stephen Warren
[not found] ` <5283BDBF.9020509-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-14 6:41 ` Hiroshi Doyu
[not found] ` <20131114.084145.998129499909471378.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-14 16:59 ` Stephen Warren
2013-11-13 11:15 ` Kumar Gala
2013-11-11 8:31 ` [PATCHv4 6/7] iommu/tegra: smmu: Rename hwgrp -> swgroups Hiroshi Doyu
2013-11-11 8:31 ` [PATCHv4 7/7] iommu/tegra: smmu: Allow duplicate ASID wirte Hiroshi Doyu
[not found] ` <1384158718-4756-8-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 0:27 ` Stephen Warren
2013-11-12 22:40 ` [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Stephen Warren
[not found] ` <5282AE55.1040701-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-13 6:04 ` Hiroshi Doyu
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