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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id n4-20020a195504000000b00492ce573726sm661503lfe.47.2022.11.18.05.11.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 18 Nov 2022 05:11:48 -0800 (PST) Message-ID: <5292cc1b-c951-c5c5-b2ef-c154baf6d7fd@linaro.org> Date: Fri, 18 Nov 2022 14:11:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 01/23] dt-bindings: display: tegra: add bindings for Tegra20 VIP Content-Language: en-US To: Luca Ceresoli Cc: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Hans Verkuil , Dmitry Osipenko , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Richard Leitner , Paul Kocialkowski References: <20221109141852.729246-1-luca.ceresoli@bootlin.com> <20221109141852.729246-2-luca.ceresoli@bootlin.com> <20221118100800.4950aec0@booty> From: Krzysztof Kozlowski In-Reply-To: <20221118100800.4950aec0@booty> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 18/11/2022 10:08, Luca Ceresoli wrote: > description: parallel video capture interface for the VI > >>> + type: object >> >> Do you expect it to grow to more channels? > > Not on Tegra20, it has one input only, but for other SoCs it's likely. > Definitely some (including Tegra20 itself) have multiple CSI-2 inputs, > and it's reasonable that this can apply to parallel input too. > > Is this enough motivation to make room for more channels, or should I > remove it since I have no plans to introduce support for other Tegra > chips? The best would be to add some more Tegra SoCs here, so that this @0 makes sense. But I guess the block can be re-used in future, so it could also stay like this. > >>> + >>> + properties: >>> + reg: true >> >> const: 0 >> >>> + >>> + ports: >>> + $ref: /schemas/graph.yaml#/properties/ports >>> + >>> + properties: >>> + port@0: >>> + $ref: /schemas/graph.yaml#/properties/port >>> + description: >>> + Port receiving the video stream from the sensor >>> + >>> + port@1: >>> + $ref: /schemas/graph.yaml#/properties/port >>> + description: >>> + Port sending the video stream to the VI >>> + >>> + required: >>> + - port@0 >>> + - port@1 >>> + >>> + additionalProperties: false >>> + >>> + required: >>> + - reg >>> + - ports >>> + >>> +unevaluatedProperties: false >>> + >>> +required: >>> + - compatible >>> + - "#address-cells" >>> + - "#size-cells" >>> + - channel@0 >>> + >>> +# see nvidia,tegra20-vi.yaml for an example >> >> That file does not have this compatible. At least not on next-20221109. > > It's added in patch 2. It's a chicken-egg problem, should I add a third > patch that adds this line only? > > ACK for all other comments you wrote. It's ok. Best regards, Krzysztof