From mboxrd@z Thu Jan 1 00:00:00 1970 From: Santosh Shilimkar Subject: Re: [PATCH v3 1/2] memory: ti-aemif: introduce AEMIF driver Date: Sat, 14 Dec 2013 14:13:47 -0500 Message-ID: <52ACADEB.30307@ti.com> References: <1386759570-29671-1-git-send-email-ivan.khoronzhuk@ti.com> <1386759570-29671-2-git-send-email-ivan.khoronzhuk@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1386759570-29671-2-git-send-email-ivan.khoronzhuk@ti.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Ivan Khoronzhuk Cc: Mark Rutland , devicetree@vger.kernel.org, grygorii.strashko@ti.com, Russell King , Pawel Moll , Stephen Warren , gregkh@linuxfoundation.org, Ian Campbell , nsekhar@ti.com, Kumar Gala , Rob Herring , linux-kernel@vger.kernel.org, "[initial author] Murali Karicheri" , linux-mtd@lists.infradead.org, Rob Landley , dwmw2@infradead.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org On Wednesday 11 December 2013 05:59 AM, Ivan Khoronzhuk wrote: > Add new AEMIF driver for EMIF16 Texas Instruments controller. > The EMIF16 module is intended to provide a glue-less interface to > a variety of asynchronous memory devices like ASRA M, NOR and NAND > memory. A total of 256M bytes of any of these memories can be > accessed at any given time via 4 chip selects with 64M byte access > per chip select. > > Synchronous memories such as DDR1 SD RAM, SDR SDRAM and Mobile SDR > are not supported. > > This controller is used on SoCs like Davinci, Keysone2 > > Signed-off-by: [initial author] Murali Karicheri > Signed-off-by: Ivan Khoronzhuk > --- Acked-by: Santosh Shilimkar