From: Marc C <marc.ceeeee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Cc: Christian Daudt <bcm-xK7y4jjYLqYh9ZMKESR00Q@public.gmane.org>,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
Florian Fainelli
<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Matt Porter <matt.porter-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH v5 8/8] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Date: Fri, 24 Jan 2014 13:39:25 -0800 [thread overview]
Message-ID: <52E2DD8D.1050609@gmail.com> (raw)
In-Reply-To: <20140124110910.GC814-NuALmloUBlrZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
Hi Mark,
> As I commented on v3 [1], these are contiguous and can be described with
> a single entry:
>
> memory {
> device_type = "memory";
> reg = <0x0 0x00000000 0x0 0xc0000000>;
> };
>
> Is there any reason to have three entries?
Oopsies, sorry for missing that.
On BCM7445 and derivatives, there are 3 memory controllers. For each memory controller,
the first 1GB of physical DRAM is mapped to:
* 0x00_0000_0000
* 0x00_4000_0000
* 0x00_8000_0000
The memory controllers aren't interleaved. So, it's possible for the SoC to have a
discontiguous memory-mapping, where a designer chooses not to populate physical DRAM in
the middle.
The 'reg' property was broken-up to have each chunk of memory given a dedicated memblock.
All that said, if you like, I can rework the patch as you've suggested.
Thanks,
Marc C
On 01/24/2014 03:09 AM, Mark Rutland wrote:
> On Wed, Jan 22, 2014 at 03:30:52AM +0000, Marc Carino wrote:
>> Add a sample DTS which will allow bootup of a board populated
>> with the BCM7445 chip.
>>
>> Signed-off-by: Marc Carino <marc.ceeeee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> Acked-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> ---
>> arch/arm/boot/dts/bcm7445.dts | 111 +++++++++++++++++++++++++++++++++++++++++
>> 1 files changed, 111 insertions(+), 0 deletions(-)
>> create mode 100644 arch/arm/boot/dts/bcm7445.dts
>>
>> diff --git a/arch/arm/boot/dts/bcm7445.dts b/arch/arm/boot/dts/bcm7445.dts
>> new file mode 100644
>> index 0000000..ffa3305
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/bcm7445.dts
>> @@ -0,0 +1,111 @@
>> +/dts-v1/;
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + model = "Broadcom STB (bcm7445)";
>> + compatible = "brcm,bcm7445", "brcm,brcmstb";
>> + interrupt-parent = <&gic>;
>> +
>> + chosen {};
>> +
>> + memory {
>> + device_type = "memory";
>> + reg = <0x00 0x00000000 0x00 0x40000000>,
>> + <0x00 0x40000000 0x00 0x40000000>,
>> + <0x00 0x80000000 0x00 0x40000000>;
>> + };
>
> As I commented on v3 [1], these are contiguous and can be described with
> a single entry:
>
> memory {
> device_type = "memory";
> reg = <0x0 0x00000000 0x0 0xc0000000>;
> };
>
> Is there any reason to have three entries?
>
> Thanks,
> Mark.
>
> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2014-January/225899.html
>
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prev parent reply other threads:[~2014-01-24 21:39 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-22 3:30 [PATCH v5 0/8] ARM: brcmstb: Add Broadcom STB SoC support Marc Carino
2014-01-22 3:30 ` [PATCH v5 1/8] ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs Marc Carino
[not found] ` <1390361452-3124-2-git-send-email-marc.ceeeee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-01-24 10:14 ` Mark Rutland
[not found] ` <20140124101407.GL15586-NuALmloUBlrZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2014-01-24 21:26 ` Marc C
2014-01-22 3:30 ` [PATCH v5 2/8] power: reset: Add reboot driver for brcmstb Marc Carino
2014-01-22 3:30 ` [PATCH v5 3/8] ARM: brcmstb: add debug UART for earlyprintk support Marc Carino
2014-01-22 3:30 ` [PATCH v5 4/8] ARM: do CPU-specific init for Broadcom Brahma15 cores Marc Carino
[not found] ` <1390361452-3124-5-git-send-email-marc.ceeeee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-01-24 10:54 ` Mark Rutland
2014-01-22 3:30 ` [PATCH v5 5/8] ARM: brcmstb: add CPU binding for Broadcom Brahma15 Marc Carino
2014-01-22 3:30 ` [PATCH v5 6/8] ARM: brcmstb: add misc. DT bindings for brcmstb Marc Carino
[not found] ` <1390361452-3124-7-git-send-email-marc.ceeeee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-01-24 11:03 ` Mark Rutland
[not found] ` <20140124110300.GB814-NuALmloUBlrZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2014-01-24 21:32 ` Marc C
[not found] ` <1390361452-3124-1-git-send-email-marc.ceeeee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-01-22 3:30 ` [PATCH v5 7/8] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15 Marc Carino
2014-01-22 22:40 ` Florian Fainelli
[not found] ` <CAGVrzcbPyaSe0aEHt157kz=quvsrBCPOUriCVG27fJfasa45jg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-01-23 1:48 ` Marc C
[not found] ` <52E074ED.5000906-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-01-23 18:26 ` Florian Fainelli
[not found] ` <CAGVrzcauDKeNM-Tqxt67Km6r6sjqvwe9_ki_GLc9_ZiXOauN8Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-01-23 22:57 ` Marc C
2014-01-22 3:30 ` [PATCH v5 8/8] ARM: brcmstb: dts: add a reference DTS for Broadcom 7445 Marc Carino
2014-01-24 11:09 ` Mark Rutland
[not found] ` <20140124110910.GC814-NuALmloUBlrZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2014-01-24 21:39 ` Marc C [this message]
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