From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42E11C5479D for ; Mon, 9 Jan 2023 04:22:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236650AbjAIEWu (ORCPT ); Sun, 8 Jan 2023 23:22:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236672AbjAIEWL (ORCPT ); Sun, 8 Jan 2023 23:22:11 -0500 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69A5213F67; Sun, 8 Jan 2023 20:08:22 -0800 (PST) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 30947Jvn044125; Sun, 8 Jan 2023 22:07:19 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1673237239; bh=glU22+kV2C2hEd7YU+VdLxMJhJVm1YatbhfBo3xh9zc=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=wEvSEJZimlD8tQutAdTITPzMVWvUz0DRex1yTXSV52oxHGLmdMlGXz3OPm2Hwid2q 1jOfLBO+Z9mlUsWWxYYR6zOttf+GM455hCXwVkq09FeggxjOcW+QCR7yy3ZMS0NYWx V6pgM3peU+1qlx7YTOrCkEdCkmw88e8KruXFvu1Y= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 30947Ji4108702 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 8 Jan 2023 22:07:19 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Sun, 8 Jan 2023 22:07:18 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Sun, 8 Jan 2023 22:07:18 -0600 Received: from [172.24.145.182] (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 30947FBj037285; Sun, 8 Jan 2023 22:07:15 -0600 Message-ID: <52f276fb-93b3-da8f-c428-05ded94d90cb@ti.com> Date: Mon, 9 Jan 2023 09:37:14 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH v7 1/8] arm64: dts: ti: k3-j721s2-main: Add support for USB Content-Language: en-US To: Matt Ranostay , , , , , , , CC: , , References: <20221122101616.770050-1-mranostay@ti.com> <20221122101616.770050-2-mranostay@ti.com> From: Vignesh Raghavendra In-Reply-To: <20221122101616.770050-2-mranostay@ti.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 22/11/22 15:46, Matt Ranostay wrote: > From: Aswath Govindraju > > Add support for single instance of USB 3.0 controller in J721S2 SoC. > > Reviewed-by: Ravi Gunasekaran > Signed-off-by: Aswath Govindraju > Signed-off-by: Matt Ranostay > --- > arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 42 ++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > index 8915132efcc1..b4869bff4f22 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi > @@ -26,6 +26,20 @@ l3cache-sram@200000 { > }; > }; > > + scm_conf: syscon@104000 { > + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; > + reg = <0x00 0x00104000 0x00 0x18000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x00 0x00 0x00104000 0x18000>; > + > + usb_serdes_mux: mux-controller-0 { This needs binding update :( +/workdir/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dtb: syscon@104000: 'mux-controller-0' does not match any of the regexes: '^clock-controller@[0-9a-f]+$', '^mux-controller@[0-9a-f]+$', 'phy@[0-9a-f]+$', 'pinctrl-[0-9]+' make dtbs_check will warn here. > + compatible = "mmio-mux"; > + #mux-control-cells = <1>; > + mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */ > + }; > + }; > + [...] -- Regards Vignesh