From: Kishon Vijay Abraham I <kishon@ti.com>
To: Loc Ho <lho@apm.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Suman Tripathi <stripathi@apm.com>, Arnd Bergmann <arnd@arndb.de>,
Jon Masters <jcm@redhat.com>, "patches@apm.com" <patches@apm.com>,
linux-kernel@vger.kernel.org, Olof Johansson <olof@lixom.net>,
Don Dutile <ddutile@redhat.com>, Tejun Heo <tj@kernel.org>,
Tuan Phan <tphan@apm.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH RESEND v10 3/4] PHY: add APM X-Gene SoC 15Gbps Multi-purpose PHY driver
Date: Thu, 27 Feb 2014 12:04:13 +0530 [thread overview]
Message-ID: <530EDC65.8060106@ti.com> (raw)
In-Reply-To: <CAPw-ZTnLYbUjQTm7QhJO5EMNqN5+dtWndSRUZn_bgMGvmNEu0Q@mail.gmail.com>
On Thursday 27 February 2014 11:55 AM, Loc Ho wrote:
> Hi,
>
>>>>> +
>>>>> +static void sds_wr(void __iomem *csr_base, u32 indirect_cmd_reg,
>>>>> + u32 indirect_data_reg, u32 addr, u32 data)
>>>>> +{
>>>>> + u32 val;
>>>>> + u32 cmd;
>>>>> +
>>>>> + cmd = CFG_IND_WR_CMD_MASK | CFG_IND_CMD_DONE_MASK;
>>>>> + cmd = CFG_IND_ADDR_SET(cmd, addr);
>>>>
>>>>
>>>>
>>>> This looks hacky. If 'CFG_IND_WR_CMD_MASK | CFG_IND_CMD_DONE_MASK' should
>>>> be set then it should be part of the second argument. From the macro
>>>> 'CFG_IND_ADDR_SET' the first argument should be more like the current value
>>>> present in the register right? I feel the macro (CFG_IND_ADDR_SET) is not
>>>> used in the way it is intended to.
>>>
>>>
>>> The macro XXX_SET is intended to update an field within the register.
>>> The update field is returned. The first assignment lines are setting
>>> another field. Those two lines can be written as:
>>>
>>> cmd = 0;
>>> cmd |= CFG_IND_WR_CMD_MASK; ==> Set the CMD bit
>>> cmd |= CFG_IND_CMD_DONE_MASK; ==> Set the DONE bit
>>> cmd = CFG_IND_ADDR_SET(cmd, addr); ===> Set the field ADDR
>>
>>
>> #define CFG_IND_ADDR_SET(dst, src) \
>> (((dst) & ~0x003ffff0) | (((u32)(src)<<4) & 0x003ffff0))
>>
>> From this macro the first argument should be the present value in that
>> register. Here you reset the address bits and write the new address bits.
>
> Yes.. This is correct. I am clearing x number of bit and then set new value.
>
>> IMO the first argument should be the value in 'csr_base + indirect_cmd_reg'.
>> So it resets the address bits in 'csr_base + indirect_cmd_reg' and write
>> down the new address bits.
>
> Yes.. The above code does just that. In addition, I am also setting
> the bits CFG_IND_WR_CMD_MASK and CFG_IND_CMD_DONE_MASK with the two
> previous statement. Think of the code flow as follow:
>
> val = readl(some void * address); /* read the register */
Where are you reading the register in your code (before CFG_IND_ADDR_SET)?
> val = XXXX_SET(val, 0x1); /* set bit 0 - assuming XXXX set
> bit 0 only */
If you want to set other bits (other than address) don't use
CFG_IND_ADDR_SET macro. That looks hacky to me.
> val = YYYY_SET(val, 0x1); /* set bit 1 - assuming YYYY set
> bit 1 only */
> val = ZZZZ_SET(val, 0x5); /* set upper 16 bit of the
> register to 0x5 - assuming ZZZZ set field of the upper 16 bits */
>
> Instead writing the above, I am replacing the above 4 lines with these
> two lines:
>
> cmd = CFG_IND_WR_CMD_MASK | CFG_IND_CMD_DONE_MASK;
> cmd = CFG_IND_ADDR_SET(cmd, addr);
>
> Is there clear?
>
> -Loc
>
Cheers
Kishon
next prev parent reply other threads:[~2014-02-27 6:34 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-25 6:14 [PATCH RESEND v10 0/4] PHY: Add APM X-Gene SoC 15Gbps Multi-purpose PHY support Loc Ho
[not found] ` <1393308882-3964-1-git-send-email-lho-qTEPVZfXA3Y@public.gmane.org>
2014-02-25 6:14 ` [PATCH RESEND v10 1/4] PHY: Add function set_speed to generic PHY framework Loc Ho
[not found] ` <1393308882-3964-2-git-send-email-lho-qTEPVZfXA3Y@public.gmane.org>
2014-02-25 6:14 ` [PATCH RESEND v10 2/4] Documentation: Add APM X-Gene SoC 15Gbps Multi-purpose PHY driver binding documentation Loc Ho
2014-02-25 6:14 ` [PATCH RESEND v10 3/4] PHY: add APM X-Gene SoC 15Gbps Multi-purpose PHY driver Loc Ho
2014-02-26 9:42 ` Kishon Vijay Abraham I
[not found] ` <530DB713.6000701-l0cyMroinI0@public.gmane.org>
2014-02-26 20:45 ` Loc Ho
2014-02-27 6:02 ` Kishon Vijay Abraham I
[not found] ` <530ED4EF.1060000-l0cyMroinI0@public.gmane.org>
2014-02-27 6:25 ` Loc Ho
2014-02-27 6:34 ` Kishon Vijay Abraham I [this message]
[not found] ` <530EDC65.8060106-l0cyMroinI0@public.gmane.org>
2014-02-27 6:41 ` Loc Ho
2014-02-27 6:47 ` Kishon Vijay Abraham I
2014-02-27 6:42 ` Kishon Vijay Abraham I
2014-02-25 13:51 ` [PATCH RESEND v10 2/4] Documentation: Add APM X-Gene SoC 15Gbps Multi-purpose PHY driver binding documentation Kishon Vijay Abraham I
2014-02-25 12:05 ` [PATCH RESEND v10 1/4] PHY: Add function set_speed to generic PHY framework Kishon Vijay Abraham I
[not found] ` <530C8711.4000600-l0cyMroinI0@public.gmane.org>
2014-02-25 13:45 ` Tejun Heo
2014-02-25 13:50 ` Kishon Vijay Abraham I
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