From: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
To: Kevin Cernekee <cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Jonas Gorski <jogo-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>,
Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>,
Florian Fainelli
<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Jon Fraser <jfraser-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Dmitry Torokhov <dtor-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
Linux MIPS Mailing List
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"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
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Subject: Re: [PATCH V2 22/22] MIPS: Add multiplatform BMIPS target
Date: Tue, 18 Nov 2014 11:15:24 +0100 [thread overview]
Message-ID: <5313988.cGSDdqXOcS@wuerfel> (raw)
In-Reply-To: <CAJiQ=7AhyAyN6Hnvtdowdh6oPknbPFMe-_PrPdzyCGe5H7eE1g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Monday 17 November 2014 13:57:07 Kevin Cernekee wrote:
> On Mon, Nov 17, 2014 at 12:33 PM, Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> wrote:
> >> This mostly depends on the desired feature set, and the delta from one
> >> board to the next. Many of the reference board sections are largely
> >> copied from a working design, but sometimes there are changes that
> >> affect us. Other times there are tweaks that can be autodetected,
> >> like a different flash chip.
> >>
> >> The analog interfaces like SATA/USB/Ethernet don't tend to vary all
> >> that much (although some may be missing ports on the board, or
> >> disabled on the chip).
> >>
> >> The pin muxing situation leaves a lot of room for board differences,
> >> and on these platforms it isn't really handled in a central place.
> >> This gets even more challenging when combined with some of the power
> >> management requirements.
> >>
> >> The peripherals that I added in my patch submission are among the
> >> easiest / safest of the bunch.
> >
> > Right, that is exactly the danger: it's easy to get the basics working
> > like this, but the differences between SoCs are not what we need DT
> > for anyway, those are easily abstracted in kernel code if necessary,
> > hardcoded by some soc version identifier.
>
> That depends on how many SoC's we're talking about...
>
> On MIPS we have literally dozens. Most of the "building blocks" are
> pretty similar, but the MMIO addresses, IRQ mappings, and
> quantity/revision of each peripheral vary. DT is ideal for
> representing these differences and for rapidly bringing up a new
> system.
Of course you can abstract SoCs using DT, and we do that all the time
now on a lot of architectures. My point is that it's possible to abstract
a board using DT without also describing the SoC in detail, but you
cannot do the reverse.
> > What you end up with in your approach is a kernel that can support
> > multiple SoCs but only some boards per SoC, and otherwise you still
> > depend on compile-time configuration.
>
> Agreed, but for legacy platforms this is somewhat inevitable. These
> systems are already in production so there is no manpower available to
> go back and test every single one-off board. It is most likely that a
> small subset of "interesting" boards will receive the best support.
> For instance, I see an arch/arm/boot/dts/bcm2835-rpi-b.dts, but that's
> hardly the only BCM2835-based platform found in the wild.
It's absolutely ok to not have the dts files for each board, and to
not test all combinations, those can always come later if anyone is
interested in it.
The one thing I believe you shouldn't do is hardwire a dtb file to
an SoC specific identifier, because that makes it impossible to
support other boards that need additional DT nodes using the same
boot method. Using a single appended dtb file instead of the built-in
lookup table would solve this well enough.
> The limited board support doesn't negate the value of having a generic
> BMIPS kernel available upstream; this build still eliminates
> duplicated efforts on many of the basic items (CPU/SMP/caching, IRQ
> controllers, UART). It also allows easy reuse of DT-ready peripherals
> that are common to the CM/DSL/STB MIPS and ARM chips, which was the
> original goal of the BCM3384 port.
>
> Going forward I would expect that with this build available in
> mainline, it will open up new opportunities for modernizing the
> bootloaders on each product line.
Yes, this is all good.
Arnd
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next prev parent reply other threads:[~2014-11-18 10:15 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-16 0:17 [PATCH V2 00/22] Multiplatform BMIPS kernel Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 01/22] irqchip: Update docs regarding irq_domain_add_tree() Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 02/22] irqchip: brcmstb-l2: fix error handling of irq_of_parse_and_map Kevin Cernekee
[not found] ` <1416097066-20452-1-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-11-16 0:17 ` [PATCH V2 03/22] irqchip: bcm7120-l2: " Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 09/22] MIPS: BMIPS: Introduce helper function to change the reset vector Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 15/22] MIPS: BMIPS: Let each platform customize the CPU1 IRQ mask Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 16/22] MIPS: BMIPS: Add special cache handling in c-r4k.c Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 19/22] Documentation: DT: Add "mti" vendor prefix Kevin Cernekee
2014-11-20 3:04 ` [PATCH V2 00/22] Multiplatform BMIPS kernel Brian Norris
2014-11-20 3:55 ` Kevin Cernekee
[not found] ` <CAJiQ=7C8h-MAuRdgzZqx2=bg8bvy7v9pv7e7tGXWmA9ghYJiqQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-20 18:09 ` Florian Fainelli
[not found] ` <546E2E3E.5040305-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-11-20 20:13 ` Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 04/22] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 05/22] irqchip: bcm7120-l2: Change DT binding to allow non-contiguous IRQEN/IRQSTAT Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 06/22] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 07/22] MIPS: BMIPS: Fix ".previous without corresponding .section" warnings Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 08/22] MIPS: BMIPS: Align secondary boot sequence with latest firmware releases Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 10/22] MIPS: BMIPS: Allow BMIPS3300 to utilize SMP ebase relocation code Kevin Cernekee
2014-11-20 23:40 ` Ralf Baechle
2014-11-16 0:17 ` [PATCH V2 11/22] MIPS: BMIPS: Mask off timer IRQs when hot-unplugging a CPU Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 12/22] MIPS: BMIPS: Explicitly configure reset vectors prior to secondary boot Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 13/22] MIPS: Allow MIPS_CPU_SCACHE to be used with different line sizes Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 14/22] MIPS: BMIPS: Fix L1_CACHE_SHIFT when BMIPS5000 is selected Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 17/22] MIPS: BMIPS: Add PRId for BMIPS5200 (Whirlwind) Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 18/22] MIPS: Create a helper function for DT setup Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 20/22] MAINTAINERS: Add entry for bcm63xx/bcm33xx UDC gadget driver Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 21/22] MAINTAINERS: Add entry for BMIPS multiplatform kernel Kevin Cernekee
2014-11-16 0:17 ` [PATCH V2 22/22] MIPS: Add multiplatform BMIPS target Kevin Cernekee
2014-11-16 21:24 ` Arnd Bergmann
2014-11-16 22:12 ` Kevin Cernekee
[not found] ` <CAJiQ=7C-HniwXiVrqQg3cnFNNYGwoxHJf8JP-XYOqM1yWoyXaw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-17 12:16 ` Arnd Bergmann
2014-11-17 14:52 ` Jonas Gorski
[not found] ` <CAOiHx=ky5T7z3T3gX382d=3sw+gGUEfnwXwpcLGa_Oi5YyBwgw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-17 16:13 ` Arnd Bergmann
2014-11-17 17:19 ` Kevin Cernekee
[not found] ` <CAJiQ=7An5eZ3j2+Zkx1crV9pBSVodkEQ+6ESGcFk5z0tDV7cHA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-17 18:55 ` Arnd Bergmann
2014-11-17 19:47 ` Kevin Cernekee
2014-11-17 20:33 ` Arnd Bergmann
2014-11-17 21:57 ` Kevin Cernekee
[not found] ` <CAJiQ=7AhyAyN6Hnvtdowdh6oPknbPFMe-_PrPdzyCGe5H7eE1g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-18 10:15 ` Arnd Bergmann [this message]
2014-11-17 17:01 ` Kevin Cernekee
[not found] ` <CAJiQ=7A29-v5mo1ybvE2UodOZx-FoGeBTHYcTZuX-LaqRaF1Lw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-17 18:46 ` Arnd Bergmann
2014-11-17 19:39 ` Kevin Cernekee
2014-11-17 20:40 ` Arnd Bergmann
2014-11-17 21:21 ` Kevin Cernekee
[not found] ` <CAJiQ=7B6Xwz2iqqH4vEG8WzPOzHj7NHsuGWqq49uy-E34RHp4A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-17 23:06 ` Jonas Gorski
2014-11-18 10:19 ` Arnd Bergmann
[not found] ` <1416097066-20452-23-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-11-17 14:44 ` Jonas Gorski
[not found] ` <CAOiHx=mGzPKO4N7KR+5FM1RfFDF+-wncdBz6PavR0q47Gtd2Jg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-17 20:35 ` Kevin Cernekee
[not found] ` <CAJiQ=7AMiRq8rbLmsKe0s9+vr91BRrL4s3mZWcsVgyS0bLgThw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-17 23:00 ` Jonas Gorski
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