[PATCH v2 0/6] Armada 380 NAND support

[PATCH v2 0/6] Armada 380 NAND support

[Ezequiel Garcia]

From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

This patchset adds support for the NAND on Armada 380/385 SoCs.

The first patch adds a new "armada-380-corediv-clock" compatible
string, with its proper SoC-specific structure, adding the register
layout for this SoC family.

The second and third patches add the devicetree changes to support
the Core Divider clock.

After adding its clock source, the fourth and fifth patches add
the NAND devicetree changes. The NAND controller is compatible with
the Armada 370 controller, so we are currently support it using the
same compatible string.

The last patch updates the binding documentation for the Core Divider
clock, which is missing the information about the already supported
Armada 375 compatible string.

This series is based on linux-next 20140307. I expect it will apply
cleanly on v3.15-rc1; if that's not the case, I'll send a rebased patchset.

The clock and devicetree changes are mostly independent so they
can be merged through the clock and mvebu tree respectively.

Changes from v1:

  * Changed nand@d0000 with flash@d0000 in the devicetree. The
    latter is compliant with ePAPR recomendation (see ePAPR v1.1,
    section 2.2.2, Generic Names Recommendation).

Ezequiel Garcia (6):
  clk: mvebu: Support Armada 380 SoC on the core divider clock
  ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
  ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
  ARM: mvebu: Add support for NAND controller in Armada 38x SoC
  ARM: mvebu: Enable NAND controller in Armada 385-DB
  clk: mvebu: Update binding documentation for the core divider clock

 .../bindings/clock/mvebu-corediv-clock.txt         |  5 ++++-
 arch/arm/boot/dts/armada-385-db.dts                | 21 ++++++++++++++++++
 arch/arm/boot/dts/armada-38x.dtsi                  | 25 ++++++++++++++++++++++
 drivers/clk/mvebu/clk-corediv.c                    | 23 ++++++++++++++++++++
 4 files changed, 73 insertions(+), 1 deletion(-)

-- 
1.9.0

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[PATCH v2 1/6] clk: mvebu: Support Armada 380 SoC on the core divider clock

[Ezequiel Garcia]

From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

This commit adds support for the Core Divider clocks of the Armada
380 SoCs. Similarly to Armada 370 and XP, the Core Divider clocks of
the 380 have gate capabilities. The only difference is the register layout.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
 drivers/clk/mvebu/clk-corediv.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/clk/mvebu/clk-corediv.c b/drivers/clk/mvebu/clk-corediv.c
index 4da6076..911dbb6 100644
--- a/drivers/clk/mvebu/clk-corediv.c
+++ b/drivers/clk/mvebu/clk-corediv.c
@@ -204,6 +204,22 @@ static const struct clk_corediv_soc_desc armada370_corediv_soc = {
 	.ratio_offset = 0x8,
 };
 
+static const struct clk_corediv_soc_desc armada380_corediv_soc = {
+	.descs = mvebu_corediv_desc,
+	.ndescs = ARRAY_SIZE(mvebu_corediv_desc),
+	.ops = {
+		.enable = clk_corediv_enable,
+		.disable = clk_corediv_disable,
+		.is_enabled = clk_corediv_is_enabled,
+		.recalc_rate = clk_corediv_recalc_rate,
+		.round_rate = clk_corediv_round_rate,
+		.set_rate = clk_corediv_set_rate,
+	},
+	.ratio_reload = BIT(8),
+	.enable_bit_offset = 16,
+	.ratio_offset = 0x4,
+};
+
 static const struct clk_corediv_soc_desc armada375_corediv_soc = {
 	.descs = mvebu_corediv_desc,
 	.ndescs = ARRAY_SIZE(mvebu_corediv_desc),
@@ -290,3 +306,10 @@ static void __init armada375_corediv_clk_init(struct device_node *node)
 }
 CLK_OF_DECLARE(armada375_corediv_clk, "marvell,armada-375-corediv-clock",
 	       armada375_corediv_clk_init);
+
+static void __init armada380_corediv_clk_init(struct device_node *node)
+{
+	return mvebu_corediv_clk_init(node, &armada380_corediv_soc);
+}
+CLK_OF_DECLARE(armada380_corediv_clk, "marvell,armada-380-corediv-clock",
+	       armada380_corediv_clk_init);
-- 
1.9.0

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[PATCH v2 2/6] ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs

[Ezequiel Garcia]

From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

Armada 38x SoCs have a 2 GHz fixed main PLL that is used to feed
other clocks. This commit adds a DT representation of this clock
through a fixed-clock compatible node.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
 arch/arm/boot/dts/armada-38x.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 812ce28..38fc3a0 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -341,6 +341,13 @@
 	};
 
 	clocks {
+		/* 2 GHz fixed main PLL */
+		mainpll: mainpll {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <2000000000>;
+		};
+
 		/* 25 MHz reference crystal */
 		refclk: oscillator {
 			compatible = "fixed-clock";
-- 
1.9.0

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[PATCH v2 3/6] ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs

[Ezequiel Garcia]

From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

The Armada 38x SoC family has a clock provider called "Core Divider",
derived from the fixed 2 GHz main PLL clock. This is similar to the
one on A370, A375 and AXP.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
 arch/arm/boot/dts/armada-38x.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 38fc3a0..76cc27e 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -337,6 +337,14 @@
 				compatible = "marvell,orion-mdio";
 				reg = <0x72004 0x4>;
 			};
+
+			coredivclk: corediv-clock@e4250 {
+				compatible = "marvell,armada-380-corediv-clock";
+				reg = <0xe4250 0xc>;
+				#clock-cells = <1>;
+				clocks = <&mainpll>;
+				clock-output-names = "nand";
+			};
 		};
 	};
 
-- 
1.9.0

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Re: [PATCH v2 3/6] ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs

[Sergei Shtylyov]

Hello.

On 03/13/2014 10:38 PM, Ezequiel Garcia wrote:

> From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

> The Armada 38x SoC family has a clock provider called "Core Divider",
> derived from the fixed 2 GHz main PLL clock. This is similar to the
> one on A370, A375 and AXP.

> Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
>   arch/arm/boot/dts/armada-38x.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)

> diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
> index 38fc3a0..76cc27e 100644
> --- a/arch/arm/boot/dts/armada-38x.dtsi
> +++ b/arch/arm/boot/dts/armada-38x.dtsi
> @@ -337,6 +337,14 @@
>   				compatible = "marvell,orion-mdio";
>   				reg = <0x72004 0x4>;
>   			};
> +
> +			coredivclk: corediv-clock@e4250 {

    I would suggest naming the device just "clock@e4250" on the same grounds 
of having the generic device names.

WBR, Sergei

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Re: [PATCH v2 3/6] ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs

[Ezequiel Garcia]

On Mar 13, Sergei Shtylyov wrote:
> Hello.
> 
> On 03/13/2014 10:38 PM, Ezequiel Garcia wrote:
> 
> >From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> 
> >The Armada 38x SoC family has a clock provider called "Core Divider",
> >derived from the fixed 2 GHz main PLL clock. This is similar to the
> >one on A370, A375 and AXP.
> 
> >Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> >---
> >  arch/arm/boot/dts/armada-38x.dtsi | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> 
> >diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
> >index 38fc3a0..76cc27e 100644
> >--- a/arch/arm/boot/dts/armada-38x.dtsi
> >+++ b/arch/arm/boot/dts/armada-38x.dtsi
> >@@ -337,6 +337,14 @@
> >  				compatible = "marvell,orion-mdio";
> >  				reg = <0x72004 0x4>;
> >  			};
> >+
> >+			coredivclk: corediv-clock@e4250 {
> 
>    I would suggest naming the device just "clock@e4250" on the same grounds
> of having the generic device names.
> 

Right, I overlooked this.

-- 
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
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[PATCH v2 4/6] ARM: mvebu: Add support for NAND controller in Armada 38x SoC

[Ezequiel Garcia]

From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

The Armada 38x SoC family has a NAND controller, compatible
with the controller in Armada 370/375/XP SoCs. Add support for
it in the devicetree file.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
 arch/arm/boot/dts/armada-38x.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 76cc27e..54ba6603 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -345,6 +345,16 @@
 				clocks = <&mainpll>;
 				clock-output-names = "nand";
 			};
+
+			flash@d0000 {
+				compatible = "marvell,armada370-nand";
+				reg = <0xd0000 0x54>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&coredivclk 0>;
+				status = "disabled";
+			};
 		};
 	};
 
-- 
1.9.0

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[PATCH v2 5/6] ARM: mvebu: Enable NAND controller in Armada 385-DB

[Ezequiel Garcia]

From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

The Armada 385-DB board has a NAND flash, so enable it in the
devicetree and add the partitions as prepared in the factory images.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
 arch/arm/boot/dts/armada-385-db.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index 9a13642..edcf7ff 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -80,6 +80,27 @@
 					reg = <1>;
 				};
 			};
+
+			flash: flash@d0000 {
+				status = "okay";
+				num-cs = <1>;
+				marvell,nand-keep-config;
+				marvell,nand-enable-arbiter;
+				nand-on-flash-bbt;
+
+				partition@0 {
+					label = "U-Boot";
+					reg = <0 0x800000>;
+				};
+				partition@800000 {
+					label = "Linux";
+					reg = <0x800000 0x800000>;
+				};
+				partition@1000000 {
+					label = "Filesystem";
+					reg = <0x1000000 0x3f000000>;
+				};
+			};
 		};
 
 		pcie-controller {
-- 
1.9.0

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Re: [PATCH v2 5/6] ARM: mvebu: Enable NAND controller in Armada 385-DB

[Sergei Shtylyov]

On 03/13/2014 10:39 PM, Ezequiel Garcia wrote:

> From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

> The Armada 385-DB board has a NAND flash, so enable it in the
> devicetree and add the partitions as prepared in the factory images.

> Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
>   arch/arm/boot/dts/armada-385-db.dts | 21 +++++++++++++++++++++
>   1 file changed, 21 insertions(+)

> diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
> index 9a13642..edcf7ff 100644
> --- a/arch/arm/boot/dts/armada-385-db.dts
> +++ b/arch/arm/boot/dts/armada-385-db.dts
> @@ -80,6 +80,27 @@
>   					reg = <1>;
>   				};
>   			};
> +
> +			flash: flash@d0000 {

    Note that you don't have to label your device the same way as it's named, 
i.e. you could have labelled it "nand" if it would make things clearer.
    Although I don't readily see the value of labeling nodes in the board's 
.dts file. Do you really expect to refer to it somewhere?

WBR, Sergei

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Re: [PATCH v2 5/6] ARM: mvebu: Enable NAND controller in Armada 385-DB

[Ezequiel Garcia]

On Mar 13, Sergei Shtylyov wrote:
> On 03/13/2014 10:39 PM, Ezequiel Garcia wrote:
> 
> >From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> 
> >The Armada 385-DB board has a NAND flash, so enable it in the
> >devicetree and add the partitions as prepared in the factory images.
> 
> >Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> >---
> >  arch/arm/boot/dts/armada-385-db.dts | 21 +++++++++++++++++++++
> >  1 file changed, 21 insertions(+)
> 
> >diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
> >index 9a13642..edcf7ff 100644
> >--- a/arch/arm/boot/dts/armada-385-db.dts
> >+++ b/arch/arm/boot/dts/armada-385-db.dts
> >@@ -80,6 +80,27 @@
> >  					reg = <1>;
> >  				};
> >  			};
> >+
> >+			flash: flash@d0000 {
> 
>    Note that you don't have to label your device the same way as it's named,
> i.e. you could have labelled it "nand" if it would make things clearer.

Right.

>    Although I don't readily see the value of labeling nodes in the board's
> .dts file. Do you really expect to refer to it somewhere?
> 

Yeah, I was thinking the same thing just after I sent this. No, I don't think
we need the label.

-- 
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Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
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[PATCH v2 6/6] clk: mvebu: Update binding documentation for the core divider clock

[Ezequiel Garcia]

From: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

The Core Divider clock support two new compatible strings for Armada
375 and Armada 380 SoCs. Add the compatible strings to the documentation.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
 Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt
index c62391f..520562a 100644
--- a/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt
+++ b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt
@@ -4,7 +4,10 @@ The following is a list of provided IDs and clock names on Armada 370/XP:
  0 = nand (NAND clock)
 
 Required properties:
-- compatible : must be "marvell,armada-370-corediv-clock"
+- compatible : must be "marvell,armada-370-corediv-clock",
+		       "marvell,armada-375-corediv-clock",
+		       "marvell,armada-380-corediv-clock",
+
 - reg : must be the register address of Core Divider control register
 - #clock-cells : from common clock binding; shall be set to 1
 - clocks : must be set to the parent's phandle
-- 
1.9.0

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