From: Kishon Vijay Abraham I <kishon@ti.com>
To: Roger Quadros <rogerq@ti.com>, balbi@ti.com, tony@atomide.com
Cc: devicetree@vger.kernel.org, george.cherian@ti.com,
linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 7/8] ARM: dts: dra7: Add USB related nodes
Date: Fri, 14 Mar 2014 20:24:33 +0530 [thread overview]
Message-ID: <53231829.3060602@ti.com> (raw)
In-Reply-To: <5322F20C.50600@ti.com>
On Friday 14 March 2014 05:41 PM, Roger Quadros wrote:
> On 03/14/2014 12:38 PM, Kishon Vijay Abraham I wrote:
>> Hi Roger,
>>
>> On Friday 07 March 2014 06:39 PM, Roger Quadros wrote:
>>> Add nodes for the Super Speed USB controllers, omap-control-usb,
>>> USB2 PHY and USB3 PHY devices.
>>>
>>> Remove ocp2scp1 address space from hwmod data as it is
>>> now provided via device tree.
>>>
>>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>>> ---
>>> arch/arm/boot/dts/dra7.dtsi | 110 ++++++++++++++++++++++++++++++
>>> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 10 ---
>>> 2 files changed, 110 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>>> index 597979b..1e73900 100644
>>> --- a/arch/arm/boot/dts/dra7.dtsi
>>> +++ b/arch/arm/boot/dts/dra7.dtsi
>>> @@ -811,6 +811,116 @@
>>> clocks = <&sata_ref_clk>;
>>> ti,hwmods = "sata";
>>> };
>>> +
>>> + omap_control_usb2phy1: control-phy@4a002300 {
>>> + compatible = "ti,control-phy-usb2";
>>> + reg = <0x4a002300 0x4>;
>>> + reg-names = "power";
>>> + };
>>> +
>>> + omap_control_usb3phy1: control-phy@4a002370 {
>>> + compatible = "ti,control-phy-pipe3";
>>> + reg = <0x4a002370 0x4>;
>>> + reg-names = "power";
>>> + };
>>> +
>>> + omap_control_usb2phy2: control-phy@0x4a002e74 {
>>> + compatible = "ti,control-phy-usb2-dra7";
>>> + reg = <0x4a002e74 0x4>;
>>> + reg-names = "power";
>>> + };
>>> +
>>> + /* OCP2SCP1 */
>>> + ocp2scp@4a080000 {
>>> + compatible = "ti,omap-ocp2scp";
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges;
>>> + reg = <0x4a080000 0x20>;
>>> + ti,hwmods = "ocp2scp1";
>>> +
>>> + usb2_phy1: phy@4a084000 {
>>> + compatible = "ti,omap-usb2";
>>> + reg = <0x4a084000 0x400>;
>>> + ctrl-module = <&omap_control_usb2phy1>;
>>> + clocks = <&usb_phy1_always_on_clk32k>,
>>> + <&usb_otg_ss1_refclk960m>;
>>> + clock-names = "wkupclk",
>>> + "refclk";
>>> + #phy-cells = <0>;
>>> + };
>>> +
>>> + usb2_phy2: phy@4a085000 {
>>> + compatible = "ti,omap-usb2";
>>> + reg = <0x4a085000 0x400>;
>>> + ctrl-module = <&omap_control_usb2phy2>;
>>> + clocks = <&usb_phy2_always_on_clk32k>,
>>> + <&usb_otg_ss2_refclk960m>;
>>> + clock-names = "wkupclk",
>>> + "refclk";
>>> + #phy-cells = <0>;
>>> + };
>>> +
>>> + usb3_phy1: phy@4a084400 {
>>> + compatible = "ti,omap-usb3";
>>> + reg = <0x4a084400 0x80>,
>>> + <0x4a084800 0x64>,
>>> + <0x4a084c00 0x40>;
>>> + reg-names = "phy_rx", "phy_tx", "pll_ctrl";
>>> + ctrl-module = <&omap_control_usb3phy1>;
>>> + clocks = <&usb_phy3_always_on_clk32k>,
>>> + <&sys_clkin1>,
>>> + <&usb_otg_ss1_refclk960m>,
>>> + <&dpll_core_h13x2_ck>;
>>> + clock-names = "wkupclk",
>>> + "sysclk",
>>> + "refclk",
>>> + "optclk";
>>
>> Do we use this 'optclk' in driver?
>
> No we don't. Still the device seems to work without it.
> This is supposed to be USB_LFPS_TX_GFCLK or USB3PHY_REF_CLK.
I think it should be enabled. Did you check the status of this clock in
CM_L3INIT_CLKSTCTRL? Moreover USB_LFPS_TX_GFCLK is an interface clock,
so IIUC setting the module mode will enable it.
Btw how did you tell dpll_core_h13x2_ck enables USB_LFPS_TX_GFCLK?
Cheers
Kishon
next prev parent reply other threads:[~2014-03-14 14:54 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-07 13:09 [PATCH 0/8] USB support for DRA7-evm Roger Quadros
2014-03-07 13:09 ` [PATCH 1/8] CLK: ti: dra7: Initialize USB_DPLL Roger Quadros
2014-03-07 13:43 ` Tero Kristo
2014-03-07 16:55 ` Tony Lindgren
[not found] ` <1394197751-28984-2-git-send-email-rogerq-l0cyMroinI0@public.gmane.org>
2014-03-10 12:49 ` [PATCH v2 1/8] ARM: dts: " Roger Quadros
[not found] ` <1394455761-19226-1-git-send-email-rogerq-l0cyMroinI0@public.gmane.org>
2014-03-10 13:28 ` Tero Kristo
2014-03-10 13:32 ` Roger Quadros
2014-07-02 14:23 ` [PATCH 1/8] CLK: ti: " Tero Kristo
2014-03-07 13:09 ` [PATCH 2/8] ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gate Roger Quadros
2014-03-07 13:59 ` Tero Kristo
2014-03-10 11:05 ` Roger Quadros
2014-03-07 13:09 ` [PATCH 3/8] ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss Roger Quadros
2014-03-07 13:09 ` [PATCH 4/8] phy: omap-usb2: Use generic clock names "wkupclk" and "refclk" Roger Quadros
2014-03-07 13:09 ` [PATCH 5/8] phy: omap-usb2: Add clock names to Documentation binding Roger Quadros
2014-03-07 16:04 ` Felipe Balbi
2014-03-07 16:23 ` Kishon Vijay Abraham I
2014-03-07 16:24 ` Felipe Balbi
2014-03-07 13:09 ` [PATCH 6/8] ARM: dts: omap4+: Add clocks to USB2 PHY node Roger Quadros
2014-03-07 13:09 ` [PATCH 7/8] ARM: dts: dra7: Add USB related nodes Roger Quadros
2014-03-14 10:38 ` Kishon Vijay Abraham I
[not found] ` <5322DC0E.1020600-l0cyMroinI0@public.gmane.org>
2014-03-14 12:11 ` Roger Quadros
2014-03-14 14:54 ` Kishon Vijay Abraham I [this message]
2014-03-14 15:34 ` Roger Quadros
2014-03-14 19:48 ` Felipe Balbi
2014-03-07 13:09 ` [PATCH 8/8] dts: dra7-evm: add USB support Roger Quadros
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