From: Mike Looijmans <mike.looijmans@topic.nl>
To: Eli Billauer <eli.billauer@gmail.com>, monstr@monstr.eu
Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com>,
chris@printf.net, michal.simek@xilinx.com,
linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] mmc: sdhci: add quirk for broken write protect detection
Date: Thu, 20 Mar 2014 14:04:04 +0100 [thread overview]
Message-ID: <532AE744.6000700@topic.nl> (raw)
In-Reply-To: <532AE17F.9020509@gmail.com>
I totally agree with Eli. The devicetree should read something like "WP is not
present" (which will be the case on all micro SD readers). Having "WP is
inverted" there is just misleading.
On our boards, I use MIO0 as a "heartbeat" LED. Combined with a quirk in XPS
and/or Vivado that the pinmuxing for the WP line is actually routed to MIO0
when you request it to be unrouted or to EMIO, this made the WP line on our
systems appear as semi-random.
Mike.
On 03/20/2014 01:39 PM, Eli Billauer wrote:
> Hello Michal.
>
> The Zybo board doesn't have any WP pin connected to the MicroSD card. There is
> no physical possibility for the processor to know whether the card is
> write-protected or not.
>
> As I mentioned earlier, the practical problem can be worked around by
> inverting the polarity of the WP bit, using wp-inverted. Practically speaking,
> there's no need for this patch.
>
> I insisted on this patch, because I think that the device tree should reflect
> the hardware as it is, and not contain tricks for fooling the driver into
> doing what we want. But I guess this wasn't a reason good enough for adding
> yet another quirk (to the existing 38 or so).
>
> Regards,
> Eli
>
> On 20/03/14 14:26, Michal Simek wrote:
>> we have got this from Mike (we couldn't reply because he has lost this email
>> thread.
>>
>> Mike:
>> "I think I found the issue. In ps7_init.c as generated by the tools, it sets
>> the "WP" pin not to EMIO, but to MIO 0. We use pin 0 for a status LED.
>>
>> # devmem 0XF8000830
>> 0x002E0000
>>
>> Register 0XF8000830 is SD0_WP_CD_SEL, and 0x002E0000 sets CD to pin 46 and
>> WP to pin "0", not to EMIO as I specified in the design.
>> "
>>
>> Eli: Maybe you have the same issue as Mike. Can you please check it?
>
>
Met vriendelijke groet / kind regards,
Mike Looijmans
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prev parent reply other threads:[~2014-03-20 13:04 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-02 11:20 [PATCH v2] mmc: sdhci: add quirk for broken write protect detection Eli Billauer
2014-03-04 19:26 ` Sören Brinkmann
2014-03-04 20:06 ` Eli Billauer
2014-03-04 21:00 ` Sören Brinkmann
2014-03-06 13:31 ` Mike Looijmans
2014-03-06 16:42 ` Sören Brinkmann
[not found] ` <ad0a3559-a687-4f51-b284-f515372cfad2-+Ck8Kgl/v09ZbvUCbuG1mrjjLBE8jN/0@public.gmane.org>
2014-03-20 12:26 ` Michal Simek
2014-03-20 12:39 ` Eli Billauer
2014-03-20 13:04 ` Mike Looijmans [this message]
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