From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.manjaro.org (mail.manjaro.org [116.203.91.91]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D82261428F5; Mon, 6 May 2024 09:52:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.203.91.91 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714989160; cv=none; b=az2uIPs2SuRAV3kJMABlUaRiSzb6SYb6xoiJUagKzQAYGXs2z7Ou0Yxt/08Y2yLJYKuJ9wWtJW8JD2RNBxLmaHjHvL0n3VBKnrELLrrEdycLDncCT4uLuR5LcSv8ruCuWuCVhJ60pBQ95V2Zd/5GbCl+0guumpzO4F+OxQ4oR0A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714989160; c=relaxed/simple; bh=/54d0jGVGvDU9dnTbnGZanYIS6PRw7xkNNkGVPgvq24=; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:Content-Type; b=MnsVX9L5ECfT6qf3grZqoKF6QOfbwn9Q8E6CZ4ee5nbFW1BjBdK3Bx3M6sN6aIAX2BBlm5QRtFlnl6ypa83hkDn+8arw/TdSEYlK3CNKL5gKwUk+9GtHmi0PzBir6QEpIJJ3KzzjL/7AaXru4xRKIEBxokyC8/ddqLOylfT3g1E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=manjaro.org; spf=pass smtp.mailfrom=manjaro.org; dkim=pass (2048-bit key) header.d=manjaro.org header.i=@manjaro.org header.b=XfwY1Lm5; arc=none smtp.client-ip=116.203.91.91 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=manjaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=manjaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=manjaro.org header.i=@manjaro.org header.b="XfwY1Lm5" Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=manjaro.org; s=2021; t=1714989149; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8HTnEbMGr6azDxEJRTbhySR4V4Ne6tL3XUGLhPTZCO0=; b=XfwY1Lm5t3BuJGB0djBiYApOWL755wz3BW/pJbEi+IBLPjsYvbiqv6Pb17wlKgHPWKt7sR GphaO39r/G+0W9VPdAir5gGkaHCbZE+L6gDMfg1qvOzUbgep/LwNSaGLkjbNLBfm2T6k59 XeED8IxS03ieMubGs8HREkkLSKc6BFpftpYqMXITrw80z934fJs/kq3ZXu2xBTH8KlMbZs 3XHHA7znoN7aDB28y+2/L749+kuc+U1MI+DQ1EA111kf5umZU646zdlqFasixOSH8ALu3K AspnQbuqvVbmvzzMznE2E08a8hm8U3WsccMiQBKlcyA9DAfFZDK8qAJWLFeoIQ== Date: Mon, 06 May 2024 11:52:28 +0200 From: Dragan Simic To: Alexey Charkov Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Daniel Lezcano , Viresh Kumar , Chen-Yu Tsai , Diederik de Haas , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 1/6] arm64: dts: rockchip: add thermal zones information on RK3588 In-Reply-To: <20240506-rk-dts-additions-v4-1-271023ddfd40@gmail.com> References: <20240506-rk-dts-additions-v4-0-271023ddfd40@gmail.com> <20240506-rk-dts-additions-v4-1-271023ddfd40@gmail.com> Message-ID: <5332d58d48607a5559a84a2f85ce3e1b@manjaro.org> X-Sender: dsimic@manjaro.org Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Authentication-Results: ORIGINATING; auth=pass smtp.auth=dsimic@manjaro.org smtp.mailfrom=dsimic@manjaro.org Hello Alexey, Thanks for submitting the v4 of this series! Please, see a couple of my comments below. On 2024-05-06 11:36, Alexey Charkov wrote: > This includes the necessary device tree data to allow thermal > monitoring on RK3588(s) using the on-chip TSADC device, along with > trip points for automatic thermal management. > > Each of the CPU clusters (one for the little cores and two for > the big cores) get a passive cooling trip point at 85C, which > will trigger DVFS throttling of the respective cluster upon > reaching a high temperature condition. > > All zones also have a critical trip point at 115C, which will > trigger a reset. > > Signed-off-by: Alexey Charkov > --- > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 147 > ++++++++++++++++++++++++++++++ > 1 file changed, 147 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index 6ac5ac8b48ab..ef06c1f742e8 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -10,6 +10,7 @@ > #include > #include > #include > +#include > > / { > compatible = "rockchip,rk3588"; > @@ -2368,6 +2369,152 @@ pwm15: pwm@febf0030 { > status = "disabled"; > }; > > + thermal_zones: thermal-zones { > + /* sensor near the center of the SoC */ > + package_thermal: package-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 0>; > + > + trips { > + package_crit: package-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + /* sensor between A76 cores 0 and 1 */ > + bigcore0_thermal: bigcore0-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 1>; > + > + trips { > + bigcore0_alert: bigcore0-alert { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; Doesn't removing the second passive trip, which was present in the v3, result in confusing the IPA governor? > + bigcore0_crit: bigcore0-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&bigcore0_alert>; > + cooling-device = > + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + /* sensor between A76 cores 2 and 3 */ > + bigcore2_thermal: bigcore2-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 2>; > + > + trips { > + bigcore2_alert: bigcore2-alert { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; The same question about the second passive trip applies here, and to all similar cases below. > + bigcore2_crit: bigcore2-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&bigcore2_alert>; > + cooling-device = > + <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + /* sensor between the four A55 cores */ > + little_core_thermal: littlecore-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 3>; > + > + trips { > + littlecore_alert: littlecore-alert { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + littlecore_crit: littlecore-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&littlecore_alert>; > + cooling-device = > + <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + /* sensor near the PD_CENTER power domain */ > + center_thermal: center-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 4>; > + > + trips { > + center_crit: center-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + gpu_thermal: gpu-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 5>; > + > + trips { > + gpu_crit: gpu-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + npu_thermal: npu-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 6>; > + > + trips { > + npu_crit: npu-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + }; > + > tsadc: tsadc@fec00000 { > compatible = "rockchip,rk3588-tsadc"; > reg = <0x0 0xfec00000 0x0 0x400>;