[PATCH 0/5] Renesas VMSA-compatible IPMMU DT support

[PATCH 0/5] Renesas VMSA-compatible IPMMU DT support

[Laurent Pinchart]

Hello,

This patch set adds DT support to the Renesas VMSA-compatible IPMMU driver.
The first patch refactors the driver to remove dependencies on platform data,
the second patch adds the DT bindings documentation and the third patch
implement them in the driver.

The next two patches show real-life examples for IPMMU DT bindings usage.
Patch 4/5 adds IPMMU DT nodes to the r8a7791 SoC dtsi file, and patch 5/5
enables IOMMU support for the VSP1 on the same platform.

The patches are based on top of the IPMMU driver previously submitted to the
iommu mailing list. The last patch additionally requires to VSP1 DT support
patch series previously submitted to the linux-media mailing list and is thus
a test patch only at the moment, not meant to be merged yet.

The DT bindings are pretty simple, with only three standard properties in the
IPMMU DT node. The device to IOMMU association is represented in the bus master
device nodes using an iommus property, similarly to interrupts or clocks. This
model departs from the ARM SMMU DT bindings that represent the same information
inside the IOMMU DT node. I'm not sure what's best, so I'm open to suggestions.

Every IPMMU instance serves multiple bus master devices and implements four
independent page tables and TLBs. Each bus master can be freely assigned to one
of the page tables, lowering the risk of TLB miss when multiple bus masters
require address translation at the same time. I've decided not to express the
bus master to page table association in DT as this seems to me to be a software
configuration decision, not a hardware property. Feel free to disagree.

As a side note, there's no API at the moment to configure that association. My
plan is to assign bus masters to page tables automatically in the driver in a
round-robin way. A more configurable solution might be needed later, but I
believe that's out of scope of DT.

Cc: devicetree@vger.kernel.org
Cc: Will Deacon <will.deacon@arm.com>

Laurent Pinchart (5):
  iommu/ipmmu-vmsa: Refactor micro-TLB lookup
  iommu/ipmmu-vmsa: Add device tree bindings documentation
  iommu/ipmmu-vmsa: Add device tree support
  ARM: shmobile: r8a7791: Add IPMMU DT nodes
  [TEST] ARM: shmobile: r8a7791: Enable IOMMU support for the VSP1

 .../bindings/iommu/renesas,ipmmu-vmsa.txt          |  35 +++++++
 arch/arm/boot/dts/r8a7791.dtsi                     |  54 ++++++++++
 drivers/iommu/ipmmu-vmsa.c                         | 115 +++++++++++++--------
 3 files changed, 163 insertions(+), 41 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt

-- 
Regards,

Laurent Pinchart

[PATCH 2/5] iommu/ipmmu-vmsa: Add device tree bindings documentation

[Laurent Pinchart]

Cc: devicetree@vger.kernel.org
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../bindings/iommu/renesas,ipmmu-vmsa.txt          | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt

diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
new file mode 100644
index 0000000..72e8590
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
@@ -0,0 +1,35 @@
+* Renesas VMSA-Compatible IOMMU
+
+The IPMMU is an IOMMU implementation compatible with the ARM VMSA page tables.
+It provides address translation bus masters outside of the CPU, each connected
+to the IPMMU through a port called micro-TLB.
+
+
+Required Properties:
+
+  - compatible: Must contain "renesas,ipmmu-vmsa".
+  - reg: Base address and size of the IPMMU registers.
+  - interrupts: Specifier for the MMU fault interrupt.
+
+
+Each bus master connected to an IPMMU must reference the IPMMU in its device
+node with the following property:
+
+  - iommus: A reference to the IPMMU in two cells. The first cell is a phandle
+    to the IPMMU and the second cell the number of the micro-TLB that the
+    device is connected to.
+
+
+Example: R8A7791 IPMMU-MX and VSP1-D0 bus master
+
+	ipmmu_mx: mmu@fe951800 {
+		compatible = "renasas,ipmmu-vmsa";
+		reg = <0 0xfe951800 0 0x800>;
+		interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	vsp1@fe928000 {
+		...
+		iommus = <&ipmmu_mx 13>;
+		...
+	};
-- 
1.8.3.2

Re: [PATCH 2/5] iommu/ipmmu-vmsa: Add device tree bindings documentation

[Sergei Shtylyov]

Hello.

On 03/29/2014 02:36 AM, Laurent Pinchart wrote:

> Cc: devicetree@vger.kernel.org
> Cc: Will Deacon <will.deacon@arm.com>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>   .../bindings/iommu/renesas,ipmmu-vmsa.txt          | 35 ++++++++++++++++++++++
>   1 file changed, 35 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt

> diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
> new file mode 100644
> index 0000000..72e8590
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
> @@ -0,0 +1,35 @@
> +* Renesas VMSA-Compatible IOMMU
> +
> +The IPMMU is an IOMMU implementation compatible with the ARM VMSA page tables.
> +It provides address translation bus masters outside of the CPU, each connected
                                   ^ "for" missing?

[...]

WBR, Sergei

Re: [PATCH 2/5] iommu/ipmmu-vmsa: Add device tree bindings documentation

[Laurent Pinchart]

Hi Sergei,

Thank you for the review.

On Saturday 29 March 2014 18:50:16 Sergei Shtylyov wrote:
> On 03/29/2014 02:36 AM, Laurent Pinchart wrote:
> > Cc: devicetree@vger.kernel.org
> > Cc: Will Deacon <will.deacon@arm.com>
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > 
> >  .../bindings/iommu/renesas,ipmmu-vmsa.txt          | 35 +++++++++++++++++
> >  1 file changed, 35 insertions(+)
> >  create mode 100644
> >  Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt> 
> > diff --git
> > a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
> > b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt new file
> > mode 100644
> > index 0000000..72e8590
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt
> > @@ -0,0 +1,35 @@
> > +* Renesas VMSA-Compatible IOMMU
> > +
> > +The IPMMU is an IOMMU implementation compatible with the ARM VMSA page
> > tables.
> > +It provides address translation bus masters outside of the CPU, each
> > connected
>                                    ^ "for" missing?

Of course. I'll fix that.

-- 
Regards,

Laurent Pinchart

Re: [PATCH 2/5] iommu/ipmmu-vmsa: Add device tree bindings documentation

[Geert Uytterhoeven]

Hi Laurent,

On Sat, Mar 29, 2014 at 12:36 AM, Laurent Pinchart
<laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org> wrote:
> +Required Properties:
> +
> +  - compatible: Must contain "renesas,ipmmu-vmsa".
> +  - reg: Base address and size of the IPMMU registers.
> +  - interrupts: Specifier for the MMU fault interrupt.

Does it make sense to have a property for the number of micro-TLBs,
or is this handled transparently?

E.g. ipmmu_mx has 24 micro-TLBs, but ipmmu_mp has 30.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/5] iommu/ipmmu-vmsa: Add device tree bindings documentation

[Laurent Pinchart]

Hi Geert,

On Monday 31 March 2014 10:39:48 Geert Uytterhoeven wrote:
> On Sat, Mar 29, 2014 at 12:36 AM, Laurent Pinchart wrote:
> > +Required Properties:
> > +
> > +  - compatible: Must contain "renesas,ipmmu-vmsa".
> > +  - reg: Base address and size of the IPMMU registers.
> > +  - interrupts: Specifier for the MMU fault interrupt.
> 
> Does it make sense to have a property for the number of micro-TLBs,
> or is this handled transparently?
> 
> E.g. ipmmu_mx has 24 micro-TLBs, but ipmmu_mp has 30.

The IPMMU driver doesn't need to know the number of micro-TLBs, so we should 
be fine without specifying it in DT. The micro-TLBs are configured when a bus 
master device is attached or detached, and at that point the device provides 
its micro-TLB number.

The only reason I can foresee why the number of micro-TLBs would be useful is 
to iterate over micro-TLBs when the driver probes the device to disable them 
all. A mask would probably be better than a number in that case, and I think 
we can always add that later if we find a need for it.

-- 
Regards,

Laurent Pinchart