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From: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
To: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Cc: "t.figa-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org"
	<t.figa-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org>,
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	"joshi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org"
	<joshi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org"
	<s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
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	<Varun.Sethi-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
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	<linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
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	<sachin.kamat-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Dave P Martin <Dave.Martin-5wv7dgnIgG8@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
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	<kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	"a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org"
	<a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org>,
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	<pullip.cho-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	linux-arm-kernel@lists.i
Subject: Re: [PATCH v12 11/31] documentation: iommu: add binding document of Exynos System MMU
Date: Thu, 01 May 2014 17:24:31 +0100	[thread overview]
Message-ID: <5362753F.4030904@arm.com> (raw)
In-Reply-To: <4916028.thxt7fH2bg@wuerfel>

On 01/05/14 16:53, Arnd Bergmann wrote:
> On Thursday 01 May 2014 16:11:48 Marc Zyngier wrote:
>> On 01/05/14 15:36, Dave Martin wrote:
>>> On Thu, May 01, 2014 at 02:29:50PM +0100, Arnd Bergmann wrote:
>>>> On Thursday 01 May 2014 12:15:35 Dave Martin wrote:
>>>>> On Tue, Apr 29, 2014 at 10:46:18PM +0200, Arnd Bergmann wrote:
>>>>>> I don't understand. An MSI controller is just an address that acts
>>>>>> as a DMA slave for a 4-byte inbound data packet. It has no way of
>>>>>> knowing who is sending data, other than by the address or the data
>>>>>> sent to it. Are you talking of something else?
>>>>>
>>>>> Oops, looks like there are a few points I failed to respond to here...
>>>>>
>>>>>
>>>>> I'm not an expert on PCI -- I'm prepared to believe it works that way.
>>>>>
>>>>> GICv3 can descriminate between different MSI senders based on ID
>>>>> signals on the bus.
>>>>
>>>> Any idea what this is good for? Do we have to use it? It probably doesn't
>>>> fit very well into the way Linux handles MSIs today.
>>>
>>> Marc may be better placed than me to comment on this in detail.
>>
>> As to "fitting Linux", it seems to match what Linux does fairly well
>> (see the kvm-arm64/gicv3 branch in my tree). Not saying that it does it
>> in a very simple way (far from it, actually), but it works.
> 
> ok.
> 
>> As to "what it is good for" (and before someone bursts into an Edwin
>> Starr interpretation), it mostly has to do with isolation, and the fact
>> that you may want to let the whole MSI programming to a guest (and yet
>> ensure that the guest cannot generate interrupts that would be assigned
>> to other devices). This is done by sampling the requester-id at the ITS
>> level, and use this information to index a per-device interrupt
>> translation table (I could talk for hours about the concept and its
>> variations, mostly using expletives and possibly a hammer, but I think
>> it is the time for my pink pill).
> 
> So the idea is that you want to give the guest unfiltered access to the
> PCI config space of an assigned device?
> 
> Is that safe?
> 
> If the config space access goes through the hypervisor (as I think we
> always do today), there should be no isse.

My natural tendency would be to filter everything, as we certainly don't
want the device to be reconfigured in weird and fancy ways (my PCI-foo
is a bit limited, so bear with me). But as usual, GICv3 is not PCI
specific, and is designed to cater for weird and wonderful cases, PCI
being only one possible implementation...

On a non-PCI system, you definitely could assign a MSI-like capable
device, and let the guest do its thing. I'm already seeing that kind of
design.

>>> However, I believe it's correct to say that because the GIC is not part
>>> of PCI, end-to-end MSI delivery inherently involves a non-PCI step from
>>> the PCI RC to the GIC itself.
>>>
>>> Thus this is likely to be a fundamental requirement for MSIs on ARM SoCs
>>> using GIC, if we want to have a hope of mapping MSIs to VMs efficiently.
>>
>> Indeed. GICv[34] is the ARM way of implementing MSI on SBSA compliant
>> systems (from level 1 onwards, if memory serves well). People are
>> actively building systems with this architecture, and relying on it to
>> provide VM isolation.
> 
> I don't mind it being there, but if we don't need it, we shouldn't
> have to use that isolation feature and be able to just allow any
> initiator to send an MSI.

It is not that simple. You could design things around a global ITT,
pointed to by all the possible devices in your system. But that table
would be quite big (it has to contain the routing information for all
the possible messages in your system, and must be physically
contiguous). You still need to know the devices (requester-id,
device-id, whatever), as there is no wildcard mechanism.

Also, this approach pretty much kills hotplug (you cannot easily resize
that table to add new interrupt entries). That's why I've opted for a
more dynamic configuration, where each device gets its own ITT as it
appears on the system.

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2014-05-01 16:24 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-27  7:37 [PATCH v12 00/31] iommu/exynos: Fixes and Enhancements of System MMU driver with DT Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 02/31] iommu/exynos: add missing cache flush for removed page table entries Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 04/31] iommu/exynos: fix L2TLB invalidation Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 06/31] iommu/exynos: allocate lv2 page table from own slab Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 07/31] iommu/exynos: always enable runtime PM Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 08/31] iommu/exynos: handle one instance of sysmmu with a device descriptor Shaik Ameer Basha
     [not found] ` <1398584283-22846-1-git-send-email-shaik.ameer-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2014-04-27  7:37   ` [PATCH v12 01/31] iommu/exynos: do not include removed header Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 03/31] iommu/exynos: change error handling when page table update is failed Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 05/31] iommu/exynos: remove prefetch buffer setting Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 09/31] iommu/exynos: remove dbgname from drvdata of a System MMU Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 14/31] iommu/exynos: remove custom fault handler Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 18/31] iommu/exynos: allow having multiple System MMUs for a master H/W Shaik Ameer Basha
2014-04-28 10:38     ` Tushar Behera
     [not found]       ` <535E2F96.908-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2014-05-01 14:10         ` Cho KyongHo
2014-05-06 18:05     ` Tomasz Figa
     [not found]       ` <5369245A.1060001-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-05-09 10:54         ` Cho KyongHo
2014-04-27  7:37   ` [PATCH v12 20/31] iommu/exynos: add devices attached to the System MMU to an IOMMU group Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 21/31] iommu/exynos: fix address handling Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 24/31] iommu/exynos: apply workaround of caching fault page table entries Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 25/31] iommu/exynos: enhanced error messages Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 26/31] clk: exynos: add gate clock descriptions of System MMU Shaik Ameer Basha
2014-04-27  7:37   ` [PATCH v12 27/31] ARM: dts: add System MMU nodes of exynos4 series Shaik Ameer Basha
2014-04-27  7:38   ` [PATCH v12 28/31] ARM: dts: add System MMU nodes of exynos4210 Shaik Ameer Basha
2014-04-27  7:38   ` [PATCH v12 29/31] ARM: dts: add System MMU nodes of exynos4x12 Shaik Ameer Basha
2014-04-27  7:38   ` [PATCH v12 30/31] ARM: dts: add System MMU nodes of exynos5250 Shaik Ameer Basha
     [not found]     ` <1398584283-22846-31-git-send-email-shaik.ameer-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2014-04-27 17:39       ` Vikas Sajjan
2014-04-28 23:13         ` Doug Anderson
     [not found]           ` <CAD=FV=UCpQRg9nWu5EfuzWmBpee9N3X6yCmtpRaNQxitfFZkMQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-05-01 14:16             ` Cho KyongHo
2014-04-27  7:38   ` [PATCH v12 31/31] ARM: dts: add System MMU nodes of exynos5420 Shaik Ameer Basha
2014-04-28  8:34   ` [PATCH v12 00/31] iommu/exynos: Fixes and Enhancements of System MMU driver with DT Arnd Bergmann
2014-04-30  4:50     ` Shaik Ameer Basha
2014-04-30 10:57     ` Shaik Ameer Basha
2014-05-06 17:59       ` Joerg Roedel
     [not found]         ` <20140506175904.GB12376-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2014-05-06 18:08           ` Tomasz Figa
     [not found]             ` <5369252F.4070402-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-05-07  0:44               ` Cho KyongHo
2014-05-06 18:21           ` Arnd Bergmann
2014-04-27  7:37 ` [PATCH v12 10/31] iommu/exynos: use managed device helper functions Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 11/31] documentation: iommu: add binding document of Exynos System MMU Shaik Ameer Basha
2014-04-27 18:23   ` Arnd Bergmann
2014-04-28 10:39     ` Thierry Reding
2014-04-28 10:56       ` Arnd Bergmann
2014-04-28 11:18         ` Thierry Reding
2014-04-28 12:05           ` Arnd Bergmann
2014-04-28 12:49             ` Thierry Reding
2014-04-28 19:30             ` Will Deacon
     [not found]               ` <20140428193056.GD22135-5wv7dgnIgG8@public.gmane.org>
2014-04-28 19:55                 ` Arnd Bergmann
2014-04-29 18:16                   ` Dave Martin
     [not found]                     ` <20140429181601.GE3582-M5GwZQ6tE7x5pKCnmE3YQBJ8xKzm50AiAL8bYrjMMd8@public.gmane.org>
2014-04-29 20:07                       ` Grant Grundler
     [not found]                         ` <CANEJEGs6TXNzE8cWYgEKfFSsD2w5XiYvwSbhQ_+gtfzfs+6udA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-04-29 21:00                           ` Arnd Bergmann
2014-04-30 15:14                             ` Dave Martin
2014-05-01 14:02                             ` Cho KyongHo
     [not found]                               ` <20140501230214.ed53cd0fc977225f37b14e29-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2014-05-01 14:12                                 ` Arnd Bergmann
2014-05-01 14:50                                 ` Dave Martin
2014-05-01 17:41                             ` Stephen Warren
     [not found]                               ` <53628751.9000609-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-05-02 11:41                                 ` Dave Martin
2014-04-29 20:46                       ` Arnd Bergmann
2014-05-01 11:15                         ` Dave Martin
     [not found]                           ` <20140501111527.GA3732-M5GwZQ6tE7x5pKCnmE3YQBJ8xKzm50AiAL8bYrjMMd8@public.gmane.org>
2014-05-01 13:29                             ` Arnd Bergmann
2014-05-01 14:36                               ` Dave Martin
     [not found]                                 ` <20140501143654.GB3732-M5GwZQ6tE7x5pKCnmE3YQBJ8xKzm50AiAL8bYrjMMd8@public.gmane.org>
2014-05-01 15:11                                   ` Marc Zyngier
     [not found]                                     ` <53626434.8000807-5wv7dgnIgG8@public.gmane.org>
2014-05-01 15:53                                       ` Arnd Bergmann
2014-05-01 16:24                                         ` Marc Zyngier [this message]
2014-05-01 15:46                                   ` Arnd Bergmann
2014-05-01 16:42                               ` Grant Grundler
2014-05-15 20:37             ` Thierry Reding
2014-05-16  0:39               ` Cho KyongHo
2014-04-28 17:52           ` Stephen Warren
2014-04-29  5:55       ` Hiroshi Doyu
2014-04-27  7:37 ` [PATCH v12 12/31] iommu/exynos: support for device tree Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 13/31] iommu/exynos: gating clocks of master H/W Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 15/31] iommu/exynos: handle 'mmu-masters' property of DT and improve handling sysmmu Shaik Ameer Basha
2014-04-27 18:17   ` Arnd Bergmann
2014-05-01 14:08     ` Cho KyongHo
2014-04-27  7:37 ` [PATCH v12 16/31] iommu/exynos: turn on useful configuration options Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 17/31] iommu/exynos: add support for power management subsystems Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 19/31] iommu/exynos: change rwlock to spinlock Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 22/31] iommu/exynos: use exynos-iommu specific typedef Shaik Ameer Basha
2014-04-27  7:37 ` [PATCH v12 23/31] iommu/exynos: use simpler function to get MMU version Shaik Ameer Basha

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