From mboxrd@z Thu Jan 1 00:00:00 1970 From: Roger Quadros Subject: Re: [PATCH 01/17] phy: phy-omap-pipe3: Add support for PCIe PHY Date: Wed, 14 May 2014 15:57:56 +0300 Message-ID: <53736854.7090101@ti.com> References: <1399383244-14556-1-git-send-email-kishon@ti.com> <1399383244-14556-2-git-send-email-kishon@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1399383244-14556-2-git-send-email-kishon@ti.com> Sender: linux-doc-owner@vger.kernel.org To: Kishon Vijay Abraham I , devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-pci@vger.kernel.org Cc: balajitk@ti.com List-Id: devicetree@vger.kernel.org On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote: > PCIe PHY uses an external pll instead of the internal pll used by SATA > and USB3. So added support in pipe3 PHY to use external pll. > > Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Roger Quadros -- cheers, -roger