* [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes
@ 2014-04-30 11:41 Peter Ujfalusi
2014-04-30 11:41 ` [PATCH 2/2] ARM: DTS: omap54xx-clocks: Correct abe_iclk clock node Peter Ujfalusi
2014-04-30 12:30 ` [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes Tero Kristo
0 siblings, 2 replies; 6+ messages in thread
From: Peter Ujfalusi @ 2014-04-30 11:41 UTC (permalink / raw)
To: bcousson-rdvid1DuHRBWk0Htik3J/w, tony-4v6yS6AI5VpBDgjK7y7TUQ,
t-kristo-l0cyMroinI0
Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
counterpart in OMAP4.
It is better to not write to these bits.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>
---
arch/arm/boot/dts/omap54xx-clocks.dtsi | 48 ----------------------------------
1 file changed, 48 deletions(-)
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index d487fdab3921..d784ff5d3904 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -120,10 +120,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_abe_x2_ck>;
ti,max-div = <31>;
- ti,autoidle-shift = <8>;
reg = <0x01f0>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
abe_24m_fclk: abe_24m_fclk {
@@ -164,10 +162,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_abe_x2_ck>;
ti,max-div = <31>;
- ti,autoidle-shift = <8>;
reg = <0x01f4>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_ck: dpll_core_ck {
@@ -188,10 +184,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x0150>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
c2c_fclk: c2c_fclk {
@@ -215,10 +209,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x0138>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_h12x2_ck: dpll_core_h12x2_ck {
@@ -226,10 +218,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x013c>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_h13x2_ck: dpll_core_h13x2_ck {
@@ -237,10 +227,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x0140>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_h14x2_ck: dpll_core_h14x2_ck {
@@ -248,10 +236,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x0144>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_h22x2_ck: dpll_core_h22x2_ck {
@@ -259,10 +245,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x0154>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_h23x2_ck: dpll_core_h23x2_ck {
@@ -270,10 +254,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x0158>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_h24x2_ck: dpll_core_h24x2_ck {
@@ -281,10 +263,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x015c>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_m2_ck: dpll_core_m2_ck {
@@ -292,10 +272,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_ck>;
ti,max-div = <31>;
- ti,autoidle-shift = <8>;
reg = <0x0130>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_core_m3x2_ck: dpll_core_m3x2_ck {
@@ -303,10 +281,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <31>;
- ti,autoidle-shift = <8>;
reg = <0x0134>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
iva_dpll_hs_clk_div: iva_dpll_hs_clk_div {
@@ -335,10 +311,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_iva_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x01b8>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_iva_h12x2_ck: dpll_iva_h12x2_ck {
@@ -346,10 +320,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_iva_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x01bc>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
mpu_dpll_hs_clk_div: mpu_dpll_hs_clk_div {
@@ -372,10 +344,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_mpu_ck>;
ti,max-div = <31>;
- ti,autoidle-shift = <8>;
reg = <0x0170>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
per_dpll_hs_clk_div: per_dpll_hs_clk_div {
@@ -642,10 +612,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_per_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x0158>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_per_h12x2_ck: dpll_per_h12x2_ck {
@@ -653,10 +621,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_per_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x015c>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_per_h14x2_ck: dpll_per_h14x2_ck {
@@ -664,10 +630,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_per_x2_ck>;
ti,max-div = <63>;
- ti,autoidle-shift = <8>;
reg = <0x0164>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_per_m2_ck: dpll_per_m2_ck {
@@ -675,10 +639,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_per_ck>;
ti,max-div = <31>;
- ti,autoidle-shift = <8>;
reg = <0x0150>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_per_m2x2_ck: dpll_per_m2x2_ck {
@@ -686,10 +648,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_per_x2_ck>;
ti,max-div = <31>;
- ti,autoidle-shift = <8>;
reg = <0x0150>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_per_m3x2_ck: dpll_per_m3x2_ck {
@@ -697,10 +657,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_per_x2_ck>;
ti,max-div = <31>;
- ti,autoidle-shift = <8>;
reg = <0x0154>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_unipro1_ck: dpll_unipro1_ck {
@@ -723,10 +681,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_unipro1_ck>;
ti,max-div = <127>;
- ti,autoidle-shift = <8>;
reg = <0x0210>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_unipro2_ck: dpll_unipro2_ck {
@@ -749,10 +705,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_unipro2_ck>;
ti,max-div = <127>;
- ti,autoidle-shift = <8>;
reg = <0x01d0>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
dpll_usb_ck: dpll_usb_ck {
@@ -775,10 +729,8 @@
compatible = "ti,divider-clock";
clocks = <&dpll_usb_ck>;
ti,max-div = <127>;
- ti,autoidle-shift = <8>;
reg = <0x0190>;
ti,index-starts-at-one;
- ti,invert-autoidle-bit;
};
func_128m_clk: func_128m_clk {
--
1.9.2
--
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] ARM: DTS: omap54xx-clocks: Correct abe_iclk clock node
2014-04-30 11:41 [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes Peter Ujfalusi
@ 2014-04-30 11:41 ` Peter Ujfalusi
[not found] ` <1398858096-32144-2-git-send-email-peter.ujfalusi-l0cyMroinI0@public.gmane.org>
2014-04-30 12:30 ` [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes Tero Kristo
1 sibling, 1 reply; 6+ messages in thread
From: Peter Ujfalusi @ 2014-04-30 11:41 UTC (permalink / raw)
To: bcousson, tony, t-kristo
Cc: linux-omap, devicetree, linux-arm-kernel, linux-kernel
abe_iclk's parent is aess_fclk and not abe_clk.
Also correct the parameters for clock rate calculation as used for OMAP4
since in PRCM level there's no difference between the two platform
regarding to AESS/ABE clocking.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
arch/arm/boot/dts/omap54xx-clocks.dtsi | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index d784ff5d3904..86fc507a0567 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -143,10 +143,11 @@
abe_iclk: abe_iclk {
#clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clocks = <&abe_clk>;
- clock-mult = <1>;
- clock-div = <2>;
+ compatible = "ti,divider-clock";
+ clocks = <&aess_fclk>;
+ ti,bit-shift = <24>;
+ reg = <0x0528>;
+ ti,dividers = <2>, <1>;
};
abe_lp_clk_div: abe_lp_clk_div {
--
1.9.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes
2014-04-30 11:41 [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes Peter Ujfalusi
2014-04-30 11:41 ` [PATCH 2/2] ARM: DTS: omap54xx-clocks: Correct abe_iclk clock node Peter Ujfalusi
@ 2014-04-30 12:30 ` Tero Kristo
2014-05-19 13:44 ` Tero Kristo
1 sibling, 1 reply; 6+ messages in thread
From: Tero Kristo @ 2014-04-30 12:30 UTC (permalink / raw)
To: Peter Ujfalusi, bcousson, tony
Cc: linux-omap, devicetree, linux-arm-kernel, linux-kernel
On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
> In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
> counterpart in OMAP4.
> It is better to not write to these bits.
Yeah, looks like this bug was copied over from the legacy clock data.
Acked-by: Tero Kristo <t-kristo@ti.com>
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
> arch/arm/boot/dts/omap54xx-clocks.dtsi | 48 ----------------------------------
> 1 file changed, 48 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
> index d487fdab3921..d784ff5d3904 100644
> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
> @@ -120,10 +120,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_abe_x2_ck>;
> ti,max-div = <31>;
> - ti,autoidle-shift = <8>;
> reg = <0x01f0>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> abe_24m_fclk: abe_24m_fclk {
> @@ -164,10 +162,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_abe_x2_ck>;
> ti,max-div = <31>;
> - ti,autoidle-shift = <8>;
> reg = <0x01f4>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_ck: dpll_core_ck {
> @@ -188,10 +184,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x0150>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> c2c_fclk: c2c_fclk {
> @@ -215,10 +209,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x0138>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_h12x2_ck: dpll_core_h12x2_ck {
> @@ -226,10 +218,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x013c>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_h13x2_ck: dpll_core_h13x2_ck {
> @@ -237,10 +227,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x0140>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_h14x2_ck: dpll_core_h14x2_ck {
> @@ -248,10 +236,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x0144>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_h22x2_ck: dpll_core_h22x2_ck {
> @@ -259,10 +245,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x0154>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_h23x2_ck: dpll_core_h23x2_ck {
> @@ -270,10 +254,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x0158>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_h24x2_ck: dpll_core_h24x2_ck {
> @@ -281,10 +263,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x015c>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_m2_ck: dpll_core_m2_ck {
> @@ -292,10 +272,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_ck>;
> ti,max-div = <31>;
> - ti,autoidle-shift = <8>;
> reg = <0x0130>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_core_m3x2_ck: dpll_core_m3x2_ck {
> @@ -303,10 +281,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_core_x2_ck>;
> ti,max-div = <31>;
> - ti,autoidle-shift = <8>;
> reg = <0x0134>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> iva_dpll_hs_clk_div: iva_dpll_hs_clk_div {
> @@ -335,10 +311,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_iva_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x01b8>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_iva_h12x2_ck: dpll_iva_h12x2_ck {
> @@ -346,10 +320,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_iva_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x01bc>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> mpu_dpll_hs_clk_div: mpu_dpll_hs_clk_div {
> @@ -372,10 +344,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_mpu_ck>;
> ti,max-div = <31>;
> - ti,autoidle-shift = <8>;
> reg = <0x0170>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> per_dpll_hs_clk_div: per_dpll_hs_clk_div {
> @@ -642,10 +612,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_per_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x0158>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_per_h12x2_ck: dpll_per_h12x2_ck {
> @@ -653,10 +621,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_per_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x015c>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_per_h14x2_ck: dpll_per_h14x2_ck {
> @@ -664,10 +630,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_per_x2_ck>;
> ti,max-div = <63>;
> - ti,autoidle-shift = <8>;
> reg = <0x0164>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_per_m2_ck: dpll_per_m2_ck {
> @@ -675,10 +639,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_per_ck>;
> ti,max-div = <31>;
> - ti,autoidle-shift = <8>;
> reg = <0x0150>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_per_m2x2_ck: dpll_per_m2x2_ck {
> @@ -686,10 +648,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_per_x2_ck>;
> ti,max-div = <31>;
> - ti,autoidle-shift = <8>;
> reg = <0x0150>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_per_m3x2_ck: dpll_per_m3x2_ck {
> @@ -697,10 +657,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_per_x2_ck>;
> ti,max-div = <31>;
> - ti,autoidle-shift = <8>;
> reg = <0x0154>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_unipro1_ck: dpll_unipro1_ck {
> @@ -723,10 +681,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_unipro1_ck>;
> ti,max-div = <127>;
> - ti,autoidle-shift = <8>;
> reg = <0x0210>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_unipro2_ck: dpll_unipro2_ck {
> @@ -749,10 +705,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_unipro2_ck>;
> ti,max-div = <127>;
> - ti,autoidle-shift = <8>;
> reg = <0x01d0>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> dpll_usb_ck: dpll_usb_ck {
> @@ -775,10 +729,8 @@
> compatible = "ti,divider-clock";
> clocks = <&dpll_usb_ck>;
> ti,max-div = <127>;
> - ti,autoidle-shift = <8>;
> reg = <0x0190>;
> ti,index-starts-at-one;
> - ti,invert-autoidle-bit;
> };
>
> func_128m_clk: func_128m_clk {
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: omap54xx-clocks: Correct abe_iclk clock node
[not found] ` <1398858096-32144-2-git-send-email-peter.ujfalusi-l0cyMroinI0@public.gmane.org>
@ 2014-04-30 12:31 ` Tero Kristo
2014-05-19 13:44 ` Tero Kristo
0 siblings, 1 reply; 6+ messages in thread
From: Tero Kristo @ 2014-04-30 12:31 UTC (permalink / raw)
To: Peter Ujfalusi, bcousson-rdvid1DuHRBWk0Htik3J/w,
tony-4v6yS6AI5VpBDgjK7y7TUQ
Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
> abe_iclk's parent is aess_fclk and not abe_clk.
> Also correct the parameters for clock rate calculation as used for OMAP4
> since in PRCM level there's no difference between the two platform
> regarding to AESS/ABE clocking.
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>
Acked-by: Tero Kristo <t-kristo-l0cyMroinI0@public.gmane.org>
> ---
> arch/arm/boot/dts/omap54xx-clocks.dtsi | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
> index d784ff5d3904..86fc507a0567 100644
> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
> @@ -143,10 +143,11 @@
>
> abe_iclk: abe_iclk {
> #clock-cells = <0>;
> - compatible = "fixed-factor-clock";
> - clocks = <&abe_clk>;
> - clock-mult = <1>;
> - clock-div = <2>;
> + compatible = "ti,divider-clock";
> + clocks = <&aess_fclk>;
> + ti,bit-shift = <24>;
> + reg = <0x0528>;
> + ti,dividers = <2>, <1>;
> };
>
> abe_lp_clk_div: abe_lp_clk_div {
>
--
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes
2014-04-30 12:30 ` [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes Tero Kristo
@ 2014-05-19 13:44 ` Tero Kristo
0 siblings, 0 replies; 6+ messages in thread
From: Tero Kristo @ 2014-05-19 13:44 UTC (permalink / raw)
To: Peter Ujfalusi, bcousson, tony
Cc: linux-omap, devicetree, linux-arm-kernel, linux-kernel
On 04/30/2014 03:30 PM, Tero Kristo wrote:
> On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
>> In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
>> counterpart in OMAP4.
>> It is better to not write to these bits.
>
> Yeah, looks like this bug was copied over from the legacy clock data.
>
> Acked-by: Tero Kristo <t-kristo@ti.com>
Also, queued for 3.15-rc/clk-dt.
-Tero
>
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
>> ---
>> arch/arm/boot/dts/omap54xx-clocks.dtsi | 48
>> ----------------------------------
>> 1 file changed, 48 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> index d487fdab3921..d784ff5d3904 100644
>> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> @@ -120,10 +120,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_abe_x2_ck>;
>> ti,max-div = <31>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x01f0>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> abe_24m_fclk: abe_24m_fclk {
>> @@ -164,10 +162,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_abe_x2_ck>;
>> ti,max-div = <31>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x01f4>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_ck: dpll_core_ck {
>> @@ -188,10 +184,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0150>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> c2c_fclk: c2c_fclk {
>> @@ -215,10 +209,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0138>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_h12x2_ck: dpll_core_h12x2_ck {
>> @@ -226,10 +218,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x013c>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_h13x2_ck: dpll_core_h13x2_ck {
>> @@ -237,10 +227,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0140>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_h14x2_ck: dpll_core_h14x2_ck {
>> @@ -248,10 +236,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0144>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_h22x2_ck: dpll_core_h22x2_ck {
>> @@ -259,10 +245,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0154>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_h23x2_ck: dpll_core_h23x2_ck {
>> @@ -270,10 +254,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0158>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_h24x2_ck: dpll_core_h24x2_ck {
>> @@ -281,10 +263,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x015c>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_m2_ck: dpll_core_m2_ck {
>> @@ -292,10 +272,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_ck>;
>> ti,max-div = <31>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0130>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_core_m3x2_ck: dpll_core_m3x2_ck {
>> @@ -303,10 +281,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_core_x2_ck>;
>> ti,max-div = <31>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0134>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> iva_dpll_hs_clk_div: iva_dpll_hs_clk_div {
>> @@ -335,10 +311,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_iva_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x01b8>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_iva_h12x2_ck: dpll_iva_h12x2_ck {
>> @@ -346,10 +320,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_iva_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x01bc>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> mpu_dpll_hs_clk_div: mpu_dpll_hs_clk_div {
>> @@ -372,10 +344,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_mpu_ck>;
>> ti,max-div = <31>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0170>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> per_dpll_hs_clk_div: per_dpll_hs_clk_div {
>> @@ -642,10 +612,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_per_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0158>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_per_h12x2_ck: dpll_per_h12x2_ck {
>> @@ -653,10 +621,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_per_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x015c>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_per_h14x2_ck: dpll_per_h14x2_ck {
>> @@ -664,10 +630,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_per_x2_ck>;
>> ti,max-div = <63>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0164>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_per_m2_ck: dpll_per_m2_ck {
>> @@ -675,10 +639,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_per_ck>;
>> ti,max-div = <31>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0150>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_per_m2x2_ck: dpll_per_m2x2_ck {
>> @@ -686,10 +648,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_per_x2_ck>;
>> ti,max-div = <31>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0150>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_per_m3x2_ck: dpll_per_m3x2_ck {
>> @@ -697,10 +657,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_per_x2_ck>;
>> ti,max-div = <31>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0154>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_unipro1_ck: dpll_unipro1_ck {
>> @@ -723,10 +681,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_unipro1_ck>;
>> ti,max-div = <127>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0210>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_unipro2_ck: dpll_unipro2_ck {
>> @@ -749,10 +705,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_unipro2_ck>;
>> ti,max-div = <127>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x01d0>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> dpll_usb_ck: dpll_usb_ck {
>> @@ -775,10 +729,8 @@
>> compatible = "ti,divider-clock";
>> clocks = <&dpll_usb_ck>;
>> ti,max-div = <127>;
>> - ti,autoidle-shift = <8>;
>> reg = <0x0190>;
>> ti,index-starts-at-one;
>> - ti,invert-autoidle-bit;
>> };
>>
>> func_128m_clk: func_128m_clk {
>>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: omap54xx-clocks: Correct abe_iclk clock node
2014-04-30 12:31 ` Tero Kristo
@ 2014-05-19 13:44 ` Tero Kristo
0 siblings, 0 replies; 6+ messages in thread
From: Tero Kristo @ 2014-05-19 13:44 UTC (permalink / raw)
To: Peter Ujfalusi, bcousson, tony
Cc: linux-omap, devicetree, linux-arm-kernel, linux-kernel
On 04/30/2014 03:31 PM, Tero Kristo wrote:
> On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
>> abe_iclk's parent is aess_fclk and not abe_clk.
>> Also correct the parameters for clock rate calculation as used for OMAP4
>> since in PRCM level there's no difference between the two platform
>> regarding to AESS/ABE clocking.
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
>
> Acked-by: Tero Kristo <t-kristo@ti.com>
Queued also for 3.15-rc/clk-dt.
-Tero
>
>> ---
>> arch/arm/boot/dts/omap54xx-clocks.dtsi | 9 +++++----
>> 1 file changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> index d784ff5d3904..86fc507a0567 100644
>> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> @@ -143,10 +143,11 @@
>>
>> abe_iclk: abe_iclk {
>> #clock-cells = <0>;
>> - compatible = "fixed-factor-clock";
>> - clocks = <&abe_clk>;
>> - clock-mult = <1>;
>> - clock-div = <2>;
>> + compatible = "ti,divider-clock";
>> + clocks = <&aess_fclk>;
>> + ti,bit-shift = <24>;
>> + reg = <0x0528>;
>> + ti,dividers = <2>, <1>;
>> };
>>
>> abe_lp_clk_div: abe_lp_clk_div {
>>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-05-19 13:44 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-04-30 11:41 [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes Peter Ujfalusi
2014-04-30 11:41 ` [PATCH 2/2] ARM: DTS: omap54xx-clocks: Correct abe_iclk clock node Peter Ujfalusi
[not found] ` <1398858096-32144-2-git-send-email-peter.ujfalusi-l0cyMroinI0@public.gmane.org>
2014-04-30 12:31 ` Tero Kristo
2014-05-19 13:44 ` Tero Kristo
2014-04-30 12:30 ` [PATCH 1/2] ARM: DTS: omap54xx-clocks: remove the autoidle properties for clock nodes Tero Kristo
2014-05-19 13:44 ` Tero Kristo
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