[PATCH v1 0/4] Add Qualcomm APQ8084 SoC support

[PATCH v1 0/4] Add Qualcomm APQ8084 SoC support

[Georgi Djakov]

This patchset adds basic support for the Qualcomm Snapdragon 805 APQ8084 SoC.

The first two patches add device-tree files for the SoC and the board, the
second adds the board compatible string to the DT machine descriptor and the
third patch adds the low-level debug UART base address and a Kconfig entry.

Tested on APQ8084-MTP board.

Georgi Djakov (4):
  ARM: dts: qcom: Add APQ8084 SoC support
  ARM: dts: qcom: Add APQ8084-MTP board support
  ARM: qcom: Add APQ8084-MTP board to mach-qcom
  ARM: debug: qcom: Add APQ8084 DEBUG_LL UART support

 arch/arm/Kconfig.debug                 |    9 ++
 arch/arm/boot/dts/Makefile             |    3 +-
 arch/arm/boot/dts/qcom-apq8084-mtp.dts |    6 ++
 arch/arm/boot/dts/qcom-apq8084.dtsi    |  180 ++++++++++++++++++++++++++++++++
 arch/arm/include/debug/msm.S           |    5 +
 arch/arm/mach-qcom/board.c             |    1 +
 6 files changed, 203 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/qcom-apq8084-mtp.dts
 create mode 100644 arch/arm/boot/dts/qcom-apq8084.dtsi

-- 
1.7.9.5

[PATCH v1 1/4] ARM: dts: qcom: Add APQ8084 SoC support

[Georgi Djakov]

Add support for the Qualcomm Snapdragon 805 APQ8084 SoC. It is
used on APQ8084-MTP and other boards.

Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
---
 arch/arm/boot/dts/qcom-apq8084.dtsi |  180 +++++++++++++++++++++++++++++++++++
 1 file changed, 180 insertions(+)
 create mode 100644 arch/arm/boot/dts/qcom-apq8084.dtsi

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
new file mode 100644
index 0000000..a771b3b
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -0,0 +1,180 @@
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+	model = "Qualcomm APQ 8084";
+	compatible = "qcom,apq8084";
+	interrupt-parent = <&intc>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "qcom,krait";
+			reg = <0>;
+			enable-method = "qcom,kpss-acc-v2";
+			next-level-cache = <&L2>;
+			qcom,acc = <&acc0>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "qcom,krait";
+			reg = <1>;
+			enable-method = "qcom,kpss-acc-v2";
+			next-level-cache = <&L2>;
+			qcom,acc = <&acc1>;
+		};
+
+		cpu@2 {
+			device_type = "cpu";
+			compatible = "qcom,krait";
+			reg = <2>;
+			enable-method = "qcom,kpss-acc-v2";
+			next-level-cache = <&L2>;
+			qcom,acc = <&acc2>;
+		};
+
+		cpu@3 {
+			device_type = "cpu";
+			compatible = "qcom,krait";
+			reg = <3>;
+			enable-method = "qcom,kpss-acc-v2";
+			next-level-cache = <&L2>;
+			qcom,acc = <&acc3>;
+		};
+
+		L2: l2-cache {
+			compatible = "qcom,arch-cache";
+			cache-level = <2>;
+			interrupts = <0 2 0x4>;
+			qcom,saw = <&saw_l2>;
+		};
+	};
+
+	cpu-pmu {
+		compatible = "qcom,krait-pmu";
+		interrupts = <1 7 0xf04>;
+	};
+
+	soc: soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		intc: interrupt-controller@f9000000 {
+			compatible = "qcom,msm-qgic2";
+			interrupt-controller;
+			#interrupt-cells = <3>;
+			reg = <0xf9000000 0x1000>,
+			      <0xf9002000 0x1000>;
+		};
+
+		timer {
+			compatible = "arm,armv7-timer";
+			interrupts = <1 2 0xf08>,
+				     <1 3 0xf08>,
+				     <1 4 0xf08>,
+				     <1 1 0xf08>;
+			clock-frequency = <19200000>;
+		};
+
+		timer@f9020000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			compatible = "arm,armv7-timer-mem";
+			reg = <0xf9020000 0x1000>;
+			clock-frequency = <19200000>;
+
+			frame@f9021000 {
+				frame-number = <0>;
+				interrupts = <0 8 0x4>,
+					     <0 7 0x4>;
+				reg = <0xf9021000 0x1000>,
+				      <0xf9022000 0x1000>;
+			};
+
+			frame@f9023000 {
+				frame-number = <1>;
+				interrupts = <0 9 0x4>;
+				reg = <0xf9023000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@f9024000 {
+				frame-number = <2>;
+				interrupts = <0 10 0x4>;
+				reg = <0xf9024000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@f9025000 {
+				frame-number = <3>;
+				interrupts = <0 11 0x4>;
+				reg = <0xf9025000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@f9026000 {
+				frame-number = <4>;
+				interrupts = <0 12 0x4>;
+				reg = <0xf9026000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@f9027000 {
+				frame-number = <5>;
+				interrupts = <0 13 0x4>;
+				reg = <0xf9027000 0x1000>;
+				status = "disabled";
+			};
+
+			frame@f9028000 {
+				frame-number = <6>;
+				interrupts = <0 14 0x4>;
+				reg = <0xf9028000 0x1000>;
+				status = "disabled";
+			};
+		};
+
+		saw_l2: regulator@f9012000 {
+			compatible = "qcom,saw2";
+			reg = <0xf9012000 0x1000>;
+			regulator;
+		};
+
+		acc0: clock-controller@f9088000 {
+			compatible = "qcom,kpss-acc-v2";
+			reg = <0xf9088000 0x1000>,
+			      <0xf9008000 0x1000>;
+		};
+
+		acc1: clock-controller@f9098000 {
+			compatible = "qcom,kpss-acc-v2";
+			reg = <0xf9098000 0x1000>,
+			      <0xf9008000 0x1000>;
+		};
+
+		acc2: clock-controller@f90a8000 {
+			compatible = "qcom,kpss-acc-v2";
+			reg = <0xf90a8000 0x1000>,
+			      <0xf9008000 0x1000>;
+		};
+
+		acc3: clock-controller@f90b8000 {
+			compatible = "qcom,kpss-acc-v2";
+			reg = <0xf90b8000 0x1000>,
+			      <0xf9008000 0x1000>;
+		};
+
+		restart@fc4ab000 {
+			compatible = "qcom,pshold";
+			reg = <0xfc4ab000 0x4>;
+		};
+	};
+};
-- 
1.7.9.5

[PATCH v1 2/4] ARM: dts: qcom: Add APQ8084-MTP board support

[Georgi Djakov]

Add device-tree file for APQ8084-MTP board, which belongs
to the Snapdragon 805 family.

Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
---
 arch/arm/boot/dts/Makefile             |    3 ++-
 arch/arm/boot/dts/qcom-apq8084-mtp.dts |    6 ++++++
 2 files changed, 8 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/qcom-apq8084-mtp.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 377b7c3..792f063 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -293,7 +293,8 @@ dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
 dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
 	qcom-msm8960-cdp.dtb \
-	qcom-apq8074-dragonboard.dtb
+	qcom-apq8074-dragonboard.dtb \
+	qcom-apq8084-mtp.dtb
 dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
 dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
 	s3c6410-smdk6410.dtb
diff --git a/arch/arm/boot/dts/qcom-apq8084-mtp.dts b/arch/arm/boot/dts/qcom-apq8084-mtp.dts
new file mode 100644
index 0000000..9dae387
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8084-mtp.dts
@@ -0,0 +1,6 @@
+#include "qcom-apq8084.dtsi"
+
+/ {
+	model = "Qualcomm APQ 8084-MTP";
+	compatible = "qcom,apq8084-mtp", "qcom,apq8084";
+};
-- 
1.7.9.5

[PATCH v1 3/4] ARM: qcom: Add APQ8084-MTP board to mach-qcom

[Georgi Djakov]

Add board compatibility string to the board machine descriptors.

Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
---
 arch/arm/mach-qcom/board.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-qcom/board.c b/arch/arm/mach-qcom/board.c
index bae617e..ae0a405 100644
--- a/arch/arm/mach-qcom/board.c
+++ b/arch/arm/mach-qcom/board.c
@@ -18,6 +18,7 @@ static const char * const qcom_dt_match[] __initconst = {
 	"qcom,msm8660-surf",
 	"qcom,msm8960-cdp",
 	"qcom,apq8074-dragonboard",
+	"qcom,apq8084-mtp",
 	NULL
 };
 
-- 
1.7.9.5

[PATCH v1 4/4] ARM: debug: qcom: Add APQ8084 DEBUG_LL UART support

[Georgi Djakov]

Add debug UART support for Qualcomm APQ8084 SoC. This patch
adds a Kconfig entry and the base address of the debug UART.

Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
---
 arch/arm/Kconfig.debug       |    9 +++++++++
 arch/arm/include/debug/msm.S |    5 +++++
 2 files changed, 14 insertions(+)

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index eab8ecb..91d5184 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -101,6 +101,15 @@ choice
 		bool "Kernel low-level debugging on 9263 and 9g45"
 		depends on HAVE_AT91_DBGU1
 
+	config DEBUG_APQ8084_UART
+		bool "Kernel low-level debugging messages via APQ8084 UART"
+		depends on ARCH_QCOM
+		select MSM_HAS_DEBUG_UART_HS
+		select DEBUG_MSM_UART
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to the serial port on Qualcomm APQ8084 devices.
+
 	config DEBUG_BCM2835
 		bool "Kernel low-level debugging on BCM2835 PL011 UART"
 		depends on ARCH_BCM2835
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9d653d4..178636d 100644
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -36,6 +36,11 @@
 #define MSM_DEBUG_UART_PHYS	MSM_UART3_PHYS
 #endif
 
+#ifdef CONFIG_DEBUG_APQ8084_UART
+#define MSM_DEBUG_UART_BASE	0xFA75E000
+#define MSM_DEBUG_UART_PHYS	0xF995E000
+#endif
+
 #ifdef CONFIG_DEBUG_MSM8660_UART
 #define MSM_DEBUG_UART_BASE	0xF0040000
 #define MSM_DEBUG_UART_PHYS	0x19C40000
-- 
1.7.9.5

Re: [PATCH v1 4/4] ARM: debug: qcom: Add APQ8084 DEBUG_LL UART support

[Arnd Bergmann]

On Wednesday 21 May 2014 17:57:05 Georgi Djakov wrote:
> 
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index eab8ecb..91d5184 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -101,6 +101,15 @@ choice
>                 bool "Kernel low-level debugging on 9263 and 9g45"
>                 depends on HAVE_AT91_DBGU1
>  
> +       config DEBUG_APQ8084_UART
> +               bool "Kernel low-level debugging messages via APQ8084 UART"
> +               depends on ARCH_QCOM
> +               select MSM_HAS_DEBUG_UART_HS
> +               select DEBUG_MSM_UART
> +               help
> +                 Say Y here if you want the debug print routines to direct
> +                 their output to the serial port on Qualcomm APQ8084 devices.
> +
>         config DEBUG_BCM2835
>                 bool "Kernel low-level debugging on BCM2835 PL011 UART"
>                 depends on ARCH_BCM2835
> diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
> index 9d653d4..178636d 100644
> --- a/arch/arm/include/debug/msm.S
> +++ b/arch/arm/include/debug/msm.S
> @@ -36,6 +36,11 @@
>  #define MSM_DEBUG_UART_PHYS    MSM_UART3_PHYS
>  #endif
>  
> +#ifdef CONFIG_DEBUG_APQ8084_UART
> +#define MSM_DEBUG_UART_BASE    0xFA75E000
> +#define MSM_DEBUG_UART_PHYS    0xF995E000
> +#endif
> +
>  #ifdef CONFIG_DEBUG_MSM8660_UART
>  #define MSM_DEBUG_UART_BASE    0xF0040000
>  #define MSM_DEBUG_UART_PHYS    0x19C40000
> 

Maybe we should move debug/msm.S over to use
CONFIG_DEBUG_UART_PHYS/CONFIG_DEBUG_UART_VIRT now?

	Arnd

Re: [PATCH v1 3/4] ARM: qcom: Add APQ8084-MTP board to mach-qcom

[Kumar Gala]

On May 21, 2014, at 9:57 AM, Georgi Djakov <gdjakov@mm-sol.com> wrote:

> Add board compatibility string to the board machine descriptors.
> 
> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
> ---
> arch/arm/mach-qcom/board.c |    1 +
> 1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-qcom/board.c b/arch/arm/mach-qcom/board.c
> index bae617e..ae0a405 100644
> --- a/arch/arm/mach-qcom/board.c
> +++ b/arch/arm/mach-qcom/board.c
> @@ -18,6 +18,7 @@ static const char * const qcom_dt_match[] __initconst = {
> 	"qcom,msm8660-surf",
> 	"qcom,msm8960-cdp",
> 	"qcom,apq8074-dragonboard",
> +	"qcom,apq8084-mtp",
> 	NULL
> };
> 
> -- 
> 1.7.9.5
> 

Let’s just make this “qcom,apq8084” to cover other future apq8084 based boards.

- k

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

Re: [PATCH v1 4/4] ARM: debug: qcom: Add APQ8084 DEBUG_LL UART support

[Ivan T. Ivanov]

Hi, 

On Wed, 2014-05-21 at 17:18 +0200, Arnd Bergmann wrote:
> On Wednesday 21 May 2014 17:57:05 Georgi Djakov wrote:

> >  
> > +#ifdef CONFIG_DEBUG_APQ8084_UART
> > +#define MSM_DEBUG_UART_BASE    0xFA75E000
> > +#define MSM_DEBUG_UART_PHYS    0xF995E000
> > +#endif
> > +

> Maybe we should move debug/msm.S over to use
> CONFIG_DEBUG_UART_PHYS/CONFIG_DEBUG_UART_VIRT now?
> 

There is patch which do this [1]. It was reviewed 
by Stephen Boyd [2].

Regards,
Ivan


[1] https://lkml.org/lkml/2014/4/14/312
[2] https://lkml.org/lkml/2014/4/14/542

Re: [PATCH v1 3/4] ARM: qcom: Add APQ8084-MTP board to mach-qcom

[Georgi Djakov]

On 05/21/2014 06:18 PM, Kumar Gala wrote:
>
> On May 21, 2014, at 9:57 AM, Georgi Djakov <gdjakov@mm-sol.com> wrote:
>
>> Add board compatibility string to the board machine descriptors.
>>
>> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
>> ---
>> arch/arm/mach-qcom/board.c |    1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/mach-qcom/board.c b/arch/arm/mach-qcom/board.c
>> index bae617e..ae0a405 100644
>> --- a/arch/arm/mach-qcom/board.c
>> +++ b/arch/arm/mach-qcom/board.c
>> @@ -18,6 +18,7 @@ static const char * const qcom_dt_match[] __initconst = {
>> 	"qcom,msm8660-surf",
>> 	"qcom,msm8960-cdp",
>> 	"qcom,apq8074-dragonboard",
>> +	"qcom,apq8084-mtp",
>> 	NULL
>> };
>>
>> --
>> 1.7.9.5
>>
>
> Let’s just make this “qcom,apq8084” to cover other future apq8084 based boards.
>
> - k
>

Ok, agree!

Thanks,
Georgi

Re: [PATCH v1 1/4] ARM: dts: qcom: Add APQ8084 SoC support

[Stephen Boyd]

On 05/21/14 07:57, Georgi Djakov wrote:
> +
> +		L2: l2-cache {
> +			compatible = "qcom,arch-cache";
> +			cache-level = <2>;
> +			interrupts = <0 2 0x4>;

Let's leave out interrupts until the binding is accepted.

> +			qcom,saw = <&saw_l2>;
> +		};
> +	};
> +
> +	cpu-pmu {
> +		compatible = "qcom,krait-pmu";
> +		interrupts = <1 7 0xf04>;
> +	};
> +
> +	soc: soc {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +		compatible = "simple-bus";
> +
> +		intc: interrupt-controller@f9000000 {
> +			compatible = "qcom,msm-qgic2";
> +			interrupt-controller;
> +			#interrupt-cells = <3>;
> +			reg = <0xf9000000 0x1000>,
> +			      <0xf9002000 0x1000>;
> +		};
> +
> +		timer {
> +			compatible = "arm,armv7-timer";
> +			interrupts = <1 2 0xf08>,
> +				     <1 3 0xf08>,
> +				     <1 4 0xf08>,
> +				     <1 1 0xf08>;
> +			clock-frequency = <19200000>;
> +		};

Please move this timer node out of the soc container below the pmu.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

Re: [PATCH v1 4/4] ARM: debug: qcom: Add APQ8084 DEBUG_LL UART support

[Kumar Gala]

On May 21, 2014, at 10:28 AM, Ivan T. Ivanov <iivanov@mm-sol.com> wrote:

> Hi, 
> 
> On Wed, 2014-05-21 at 17:18 +0200, Arnd Bergmann wrote:
>> On Wednesday 21 May 2014 17:57:05 Georgi Djakov wrote:
> 
>>> 
>>> +#ifdef CONFIG_DEBUG_APQ8084_UART
>>> +#define MSM_DEBUG_UART_BASE    0xFA75E000
>>> +#define MSM_DEBUG_UART_PHYS    0xF995E000
>>> +#endif
>>> +
> 
>> Maybe we should move debug/msm.S over to use
>> CONFIG_DEBUG_UART_PHYS/CONFIG_DEBUG_UART_VIRT now?
>> 
> 
> There is patch which do this [1]. It was reviewed 
> by Stephen Boyd [2].
> 
> Regards,
> Ivan
> 
> 
> [1] https://lkml.org/lkml/2014/4/14/312
> [2] https://lkml.org/lkml/2014/4/14/542

I’ll grab Ivan’s patch and send via my qcom tree to arm-soc.

- k

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

Re: [PATCH v1 1/4] ARM: dts: qcom: Add APQ8084 SoC support

[Georgi Djakov]

On 21.05.14, 20:24, Stephen Boyd wrote:
> On 05/21/14 07:57, Georgi Djakov wrote:
>> +
>> +		L2: l2-cache {
>> +			compatible = "qcom,arch-cache";
>> +			cache-level = <2>;
>> +			interrupts = <0 2 0x4>;
> 
> Let's leave out interrupts until the binding is accepted.
> 
>> +			qcom,saw = <&saw_l2>;
>> +		};
>> +	};
>> +
>> +	cpu-pmu {
>> +		compatible = "qcom,krait-pmu";
>> +		interrupts = <1 7 0xf04>;
>> +	};
>> +
>> +	soc: soc {
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +		ranges;
>> +		compatible = "simple-bus";
>> +
>> +		intc: interrupt-controller@f9000000 {
>> +			compatible = "qcom,msm-qgic2";
>> +			interrupt-controller;
>> +			#interrupt-cells = <3>;
>> +			reg = <0xf9000000 0x1000>,
>> +			      <0xf9002000 0x1000>;
>> +		};
>> +
>> +		timer {
>> +			compatible = "arm,armv7-timer";
>> +			interrupts = <1 2 0xf08>,
>> +				     <1 3 0xf08>,
>> +				     <1 4 0xf08>,
>> +				     <1 1 0xf08>;
>> +			clock-frequency = <19200000>;
>> +		};
> 
> Please move this timer node out of the soc container below the pmu.
> 

Will do. Thanks for the comments!

BR,
Georgi