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From: Nicolas Ferre <nicolas.ferre@atmel.com>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: Boris BREZILLON <boris.brezillon@free-electrons.com>,
	Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>,
	Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Andrew Victor <linux@maxim.org.za>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	devicetree@vger.kernel.org,
	"David S. Miller" <davem@davemloft.net>,
	netdev@vger.kernel.org
Subject: Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards
Date: Fri, 18 Jul 2014 16:21:36 +0200	[thread overview]
Message-ID: <53C92D70.6050604@atmel.com> (raw)
In-Reply-To: <1405022394-8311-2-git-send-email-boris.brezillon@free-electrons.com>

On 10/07/2014 21:59, Boris BREZILLON :
> Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25)
> and board specific timing configs.
> 
> Atmel has two different HW designs for its CPU modules: the first one
> (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors
> and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up
> resistor and PHYAD[1-2] to pull down resistors.
> As a result, Ronetix design will have its PHY available at address 0x1 and
> Embest design at 0x7.
> By defining both phys we're letting the phy core detect the one actually
> available on the MDIO bus.
> 
> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
> ---
> 
> Florian, I dropped your Reviewed-by tag because this patch has slightly
> changed.

Hi Florian,

I would like to have your Ack on this one as we discussed this solution
with you.

Thanks, bye,


>  arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
> index b0b1331..755369e 100644
> --- a/arch/arm/boot/dts/sama5d3xcm.dtsi
> +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
> @@ -34,6 +34,36 @@
>  
>  			macb0: ethernet@f0028000 {
>  				phy-mode = "rgmii";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				ethernet-phy@1 {
> +					reg = <0x1>;
> +					interrupt-parent = <&pioB>;
> +					interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> +					txen-skew-ps = <800>;
> +					txc-skew-ps = <3000>;
> +					rxdv-skew-ps = <400>;
> +					rxc-skew-ps = <3000>;
> +					rxd0-skew-ps = <400>;
> +					rxd1-skew-ps = <400>;
> +					rxd2-skew-ps = <400>;
> +					rxd3-skew-ps = <400>;
> +				};
> +
> +				ethernet-phy@7 {
> +					reg = <0x7>;
> +					interrupt-parent = <&pioB>;
> +					interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> +					txen-skew-ps = <800>;
> +					txc-skew-ps = <3000>;
> +					rxdv-skew-ps = <400>;
> +					rxc-skew-ps = <3000>;
> +					rxd0-skew-ps = <400>;
> +					rxd1-skew-ps = <400>;
> +					rxd2-skew-ps = <400>;
> +					rxd3-skew-ps = <400>;
> +				};
>  			};
>  
>  			pmc: pmc@fffffc00 {
> 


-- 
Nicolas Ferre

  parent reply	other threads:[~2014-07-18 14:21 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-10 19:59 [PATCH v3 0/2] ARM: at91: remove phy fixup for sama5d3xek boards Boris BREZILLON
2014-07-10 19:59 ` [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to " Boris BREZILLON
     [not found]   ` <1405022394-8311-2-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-07-11  1:47     ` Bo Shen
2014-07-18 14:21   ` Nicolas Ferre [this message]
2014-07-18 15:48     ` Florian Fainelli
     [not found]     ` <53C92D70.6050604-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2014-07-21 17:44       ` Florian Fainelli
2014-07-10 19:59 ` [PATCH v3 2/2] ARM: at91: remove phy fixup for " Boris BREZILLON
     [not found] ` <1405022394-8311-1-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-07-18 14:24   ` [PATCH v3 0/2] " Nicolas Ferre

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