Re: [PATCH v2 06/11] ARM: dts: zynq: Add DMAC for Parallella

["Andreas Färber" <afaerber-l3A5Bk7waGM@public.gmane.org>]

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Am 25.07.2014 10:02, schrieb Michal Simek:
> On 07/25/2014 01:28 AM, Sören Brinkmann wrote:
>> On Fri, 2014-07-25 at 01:00AM +0200, Andreas Färber wrote:
>>> Signed-off-by: Andreas Färber <afaerber-l3A5Bk7waGM@public.gmane.org>
>>> ---
>>>  v2: New
>>>  
>>>  arch/arm/boot/dts/zynq-7000.dtsi      | 17 +++++++++++++++++
>>>  arch/arm/boot/dts/zynq-parallella.dts |  4 ++++
>>>  2 files changed, 21 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
>>> index eed3df0..1a70277 100644
>>> --- a/arch/arm/boot/dts/zynq-7000.dtsi
>>> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
>>> @@ -223,6 +223,23 @@
>>>  			};
>>>  		};
>>>  
>>> +		dmac_s: dmac@f8003000 {
>>> +			compatible = "arm,pl330", "arm,primecell";
>>> +			reg = <0xf8003000 0x1000>;
>>> +			status = "disabled";
>> I think for this IP we can omit the 'status' property since it is always
>> enabled. I don't see a reason to override it in each board DT.
> 
> Done this change myself

Fine with me, but allow me to point out that the TRM documents the DMAC
being mapped as DMAC S at the above address, and as DMAC NS at F800_4000
(secure vs. non-secure, ch. 4.6, p. 116). Not sure how this would be
handled driver-wise if not through alternative dt nodes?

>>> +			interrupt-parent = <&intc>;
>>> +			interrupts = <0 13 4>,
>>> +			             <0 14 4>, <0 15 4>,
>>> +			             <0 16 4>, <0 17 4>,
>>> +			             <0 40 4>, <0 41 4>,
>>> +			             <0 42 4>, <0 43 4>;
>>> +			#dma-cells = <1>;
>>> +			#dma-channels = <8>;
>>> +			#dma-requests = <4>;
>>> +			clocks = <&clkc 27>;
>>> +			clock-names = "apb_pclk";
>>> +		};
>>> +
>>
>> Acked-by: Soren Brinkmann <soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
> 
> 
> Applied to zynq/dt branch.
> https://github.com/Xilinx/linux-xlnx/commits/zynq/dt

Thanks,
Andreas

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