From: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <Mark.Rutland@arm.com>,
"jason@lakedaemon.net" <jason@lakedaemon.net>,
Pawel Moll <Pawel.Moll@arm.com>,
Catalin Marinas <Catalin.Marinas@arm.com>,
Will Deacon <Will.Deacon@arm.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"Harish.Kasiviswanathan@amd.com" <Harish.Kasiviswanathan@amd.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH 3/4 V3] irqchip: gic: Add supports for ARM GICv2m MSI(-X)
Date: Fri, 1 Aug 2014 11:29:40 -0500 [thread overview]
Message-ID: <53DBC074.3030309@amd.com> (raw)
In-Reply-To: <53DBB562.5020003@amd.com>
On 8/1/2014 10:42 AM, Suravee Suthikulanit wrote:
>>> +#ifdef CONFIG_SMP
>>> + .irq_set_affinity = gic_set_affinity,
>>> +#endif
>>> +#ifdef CONFIG_PM
>>> + .irq_set_wake = gic_set_wake,
>>> +#endif
>>> +};
>>> +
>>> +#ifdef CONFIG_OF
>>> +static int __init
>>> +gicv2m_of_init(struct device_node *node, struct device_node *parent)
>>> +{
>>> + struct gic_chip_data *gic;
>>> + int ret;
>>> +
>>> + ret = _gic_of_init(node, parent, &gicv2m_chip, &gic);
>>> + if (ret) {
>>> + pr_err("GICv2m: Failed to initialize GIC\n");
>>> + return ret;
>>> + }
>>> +
>>> + gic->msi_chip.owner = THIS_MODULE;
>>> + gic->msi_chip.of_node = node;
>>> + gic->msi_chip.setup_irq = gicv2m_setup_msi_irq;
>>> + gic->msi_chip.teardown_irq = gicv2m_teardown_msi_irq;
>>> + ret = of_pci_msi_chip_add(&gic->msi_chip);
>>> + if (ret) {
>>> + /* MSI is optional and not supported here */
>>> + pr_info("GICv2m: MSI is not supported.\n");
>>> + return 0;
>>> + }
>>> +
>>> + ret = gicv2m_msi_init(node, &gic->v2m_data);
>>> + if (ret)
>>> + return ret;
>>> + return ret;
>>> +}
>>> +
>>> +IRQCHIP_DECLARE(arm_gic_400_v2m, "arm,gic-400-v2m", gicv2m_of_init);
>>
>> So if you follow my advise of reversing your probing and call into the
>> v2m init from the main GIC driver, you could take a irq_chip as a
>> parameter, and use it to populate the v2m irq_chip, only overriding the
>> two methods that actually differ.
>>
>> This would have the net effect of completely dropping patch #2, which
>> becomes effectively useless.
>>
>
> [Suravee] Ok, lemme look into this.
So, in previous revision, you mentioned that we should have a separate
irq_chip for gicv2m stuff, is that is still the case here?
Thanks,
Suravee
next prev parent reply other threads:[~2014-08-01 16:29 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-09 23:05 [PATCH 0/4 V3] irqchip: gic: Introduce ARM GICv2m MSI(-X) support suravee.suthikulpanit
2014-07-09 23:05 ` [PATCH 1/4 V3] irqchip: gic: Add binding probe for ARM GIC400 suravee.suthikulpanit
2014-07-14 14:03 ` Heiko Stübner
2014-07-14 22:03 ` [PATCH] " Heiko Stübner
2014-07-15 8:01 ` Will Deacon
2014-07-17 12:48 ` Jason Cooper
2014-07-17 14:13 ` Suravee Suthikulanit
2014-07-17 13:31 ` Mark Rutland
2014-07-09 23:05 ` [PATCH 2/4 V3] irqchip: gic: Restructuring ARM GIC code suravee.suthikulpanit
2014-07-17 13:12 ` Jason Cooper
2014-07-09 23:05 ` [PATCH 3/4 V3] irqchip: gic: Add supports for ARM GICv2m MSI(-X) suravee.suthikulpanit
2014-07-13 23:01 ` Jason Cooper
2014-07-17 13:13 ` Jason Cooper
2014-07-17 13:17 ` Mark Rutland
2014-07-30 14:57 ` Marc Zyngier
[not found] ` <87zjfqj3mc.fsf-BgpFEFc6EmV6Fr0h90IsVGS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2014-08-01 15:42 ` Suravee Suthikulanit
2014-08-01 16:05 ` Marc Zyngier
2014-08-01 16:29 ` Suravee Suthikulanit [this message]
2014-08-01 17:05 ` Marc Zyngier
2014-08-18 0:41 ` Rob Herring
2014-07-09 23:05 ` [PATCH 4/4 V3] irqchip: gicv2m: Add support for multiple MSI for ARM64 GICv2m suravee.suthikulpanit
2014-07-13 23:03 ` Jason Cooper
2014-07-17 12:53 ` Jason Cooper
2014-07-30 15:16 ` Marc Zyngier
2014-08-01 14:36 ` Suravee Suthikulanit
2014-08-01 14:51 ` Marc Zyngier
2014-08-01 16:19 ` Suravee Suthikulanit
2014-07-13 23:14 ` [PATCH 0/4 V3] irqchip: gic: Introduce ARM GICv2m MSI(-X) support Jason Cooper
2014-07-14 15:59 ` Suravee Suthikulanit
2014-07-17 12:51 ` Jason Cooper
2014-07-17 13:18 ` Jason Cooper
2014-07-17 13:55 ` Mark Rutland
2014-07-17 14:12 ` Jason Cooper
2014-07-18 9:02 ` Mark Rutland
2014-07-18 12:31 ` Jason Cooper
2014-07-18 12:40 ` Mark Rutland
2014-07-17 14:48 ` Suravee Suthikulanit
2014-07-18 9:04 ` Mark Rutland
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53DBC074.3030309@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=Catalin.Marinas@arm.com \
--cc=Harish.Kasiviswanathan@amd.com \
--cc=Mark.Rutland@arm.com \
--cc=Pawel.Moll@arm.com \
--cc=Will.Deacon@arm.com \
--cc=devicetree@vger.kernel.org \
--cc=jason@lakedaemon.net \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).