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From: Thor Thayer <tthayer@opensource.altera.com>
To: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Lee Jones <lee.jones@linaro.org>,
	robherring2@gmail.com, pawel.moll@arm.com, mark.rutland@arm.com,
	ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
	rob@landley.net, linux@arm.linux.org.uk, atull@altera.com,
	delicious.quinoa@gmail.com, dinguyen@altera.com,
	dougthompson@xmission.com, grant.likely@linaro.org, bp@alien8.de,
	sameo@linux.intel.com, devicetree@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-edac@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com,
	Alan Tull <atull@opensource.altera.com>
Subject: Re: [PATCHv9 1/3] mfd: altera: Add Altera SDRAM Controller
Date: Mon, 4 Aug 2014 11:09:20 -0500	[thread overview]
Message-ID: <53DFB030.1070406@opensource.altera.com> (raw)
In-Reply-To: <20140802170811.GA20550@pengutronix.de>


On 08/02/2014 12:08 PM, Steffen Trumtrar wrote:
> Hi!
>
> On Fri, Aug 01, 2014 at 05:27:57PM -0500, Thor Thayer wrote:
>> On 08/01/2014 03:13 AM, Lee Jones wrote:
>>> On Thu, 31 Jul 2014, Thor Thayer wrote:
>>>> On 07/31/2014 03:26 AM, Lee Jones wrote:
>>>>> On Wed, 30 Jul 2014, tthayer@opensource.altera.com wrote:
> [...]
>
>>>>>> +u32 altera_sdr_readl(struct altera_sdr *sdr, u32 reg_offset)
>>>>>> +{
>>>>>> +	return readl(sdr->reg_base + reg_offset);
>>>>>> +}
>>>>>> +EXPORT_SYMBOL_GPL(altera_sdr_readl);
>>>>>> +
>>>>>> +void altera_sdr_writel(struct altera_sdr *sdr, u32 reg_offset, u32 value)
>>>>>> +{
>>>>>> +	writel(value, sdr->reg_base + reg_offset);
>>>>>> +}
>>>>>> +EXPORT_SYMBOL_GPL(altera_sdr_writel);
>> We'd prefer to use syscon and that is what we started with. If you'd
>> like to be our advocate, I will return to that because it was pretty
>> clean. My primary concern is to get it upstreamed and if it is MFD
>> then I'll make the changes.
>>
>> Here are the threads.
>> http://marc.info/?l=linux-kernel&m=140128791902800&w=2
> The conclusion of this thread was syscon for offset 0x0, no ?!
> And if you decide to have new writel/readl functions, I'd prefer if you don't
> change the order of parameters just because. That always weirds me out, when
> there are vendorname_writel functions, that only change the API of writel and
> nothing else (not exactly the case here).
Hi Steffen,

Yes, I see your point on the order of parameters. i will change it.

As for the syscon only at offset 0, I submitted that in version 7 & 8. 
It wasn't as clean as the version using syscon for the entire range.  It 
could also require changes to the SDRAM controller binding as things are 
added in the future.  My understanding is the bindings should not change 
significantly and changes are frowned upon.

After going through this exercise in a couple of different ways, I'm 
leaning toward using syscon for the entire SDRAM controller register range.

Is there a good reason not to use syscon on the entire register range?

Thanks,

Thor
>
> Regards,
> Steffen
>

  reply	other threads:[~2014-08-04 16:09 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-30 18:22 [PATCHv9 0/3] Addition of Altera EDAC support tthayer
     [not found] ` <1406744573-609-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2014-07-30 18:22   ` [PATCHv9 1/3] mfd: altera: Add Altera SDRAM Controller tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2014-07-31  8:26     ` Lee Jones
2014-07-31 20:00       ` Thor Thayer
2014-08-01  8:13         ` Lee Jones
2014-08-01 22:27           ` Thor Thayer
2014-08-02 17:08             ` Steffen Trumtrar
2014-08-04 16:09               ` Thor Thayer [this message]
2014-08-04  8:41             ` Lee Jones
2014-07-30 18:22   ` [PATCHv9 2/3] edac: altera: Add Altera EDAC support tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2014-07-30 18:22 ` [PATCHv9 3/3] arm: dts: Add Altera SDRAM controller bindings tthayer
2014-08-18  0:50   ` Rob Herring
2014-08-18 14:44     ` Thor Thayer

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