[PATCH 0/3] ARM: dts: socfpga: updates for SOCFPGA

[PATCH 0/3] ARM: dts: socfpga: updates for SOCFPGA

[dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx]

From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

Just a few DTS updates for the SOCFPGA platform.

patch 1/3 : cleanup
patch 2/3 : Add a SD/MMC card detect entry
patch 3/3 : Add a /memserve/ section for the platform

Dinh Nguyen (3):
  ARM: dts: socfpga: remove extra alias in the ArriaV devkit
  ARM: dts: socfpga: Add SD card detect
  ARM: dts: socfpga: memreserve first 4KB for SMP code

 arch/arm/boot/dts/socfpga_arria5.dtsi        | 1 +
 arch/arm/boot/dts/socfpga_arria5_socdk.dts   | 7 -------
 arch/arm/boot/dts/socfpga_cyclone5.dtsi      | 3 ++-
 arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 4 ++++
 4 files changed, 7 insertions(+), 8 deletions(-)

-- 
2.0.3

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[PATCH 1/3] ARM: dts: socfpga: remove extra alias in the ArriaV devkit

[dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx]

From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

commit [2755e187 dts: socfpga: Add DTS entry for adding the stmmac glue
layer for stmmac.] added an extra ethernet alias in the ArriaV devkit
board file. This patch removes it.

Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
 arch/arm/boot/dts/socfpga_arria5_socdk.dts | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
index d532d17..27d551c 100644
--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
@@ -37,13 +37,6 @@
 		*/
 		ethernet0 = &gmac1;
 	};
-
-	aliases {
-		/* this allow the ethaddr uboot environmnet variable contents
-		 * to be added to the gmac1 device tree blob.
-		 */
-		ethernet0 = &gmac1;
-	};
 };
 
 &gmac1 {
-- 
2.0.3

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[PATCH 2/3] ARM: dts: socfpga: Add SD card detect

[dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx]

From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect.

Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
 arch/arm/boot/dts/socfpga_cyclone5.dtsi      | 2 +-
 arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index 1ee03c4..33cad8b 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -28,7 +28,7 @@
 			};
 		};
 
-		dwmmc0@ff704000 {
+		mmc0: dwmmc0@ff704000 {
 			num-slots = <1>;
 			broken-cd;
 			bus-width = <4>;
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
index 45de151..d7296a5 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -68,6 +68,10 @@
 	};
 };
 
+&mmc0 {
+	cd-gpios = <&gpio1 18 0>;
+};
+
 &usb1 {
 	status = "okay";
 };
-- 
2.0.3

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Re: [PATCH 2/3] ARM: dts: socfpga: Add SD card detect

[Pavel Machek]

On Thu 2014-08-14 10:51:30, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> 
> Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC
> card detect.

Are there previous revisions outside Altera?

									Pavel

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Re: [PATCH 2/3] ARM: dts: socfpga: Add SD card detect

[Dinh Nguyen]

On 8/14/14, 1:51 PM, Pavel Machek wrote:
> On Thu 2014-08-14 10:51:30, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
>> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>>
>> Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC
>> card detect.
> 
> Are there previous revisions outside Altera?
> 

Not with SD card detect.

dinh
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Re: [PATCH 2/3] ARM: dts: socfpga: Add SD card detect

[Pavel Machek]

On Thu 2014-08-14 15:57:52, Dinh Nguyen wrote:
> 
> 
> On 8/14/14, 1:51 PM, Pavel Machek wrote:
> > On Thu 2014-08-14 10:51:30, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
> >> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> >>
> >> Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC
> >> card detect.
> > 
> > Are there previous revisions outside Altera?
> > 
> 
> Not with SD card detect.

So this patch will break those revision C (and below) boards, by
adding gpio for card detect that does not exists there, no?

Confused,
									Pavel
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Re: [PATCH 2/3] ARM: dts: socfpga: Add SD card detect

[Dinh Nguyen]

On 8/14/14, 3:59 PM, Pavel Machek wrote:
> On Thu 2014-08-14 15:57:52, Dinh Nguyen wrote:
>>
>>
>> On 8/14/14, 1:51 PM, Pavel Machek wrote:
>>> On Thu 2014-08-14 10:51:30, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
>>>> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>>>>
>>>> Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC
>>>> card detect.
>>>
>>> Are there previous revisions outside Altera?
>>>
>>
>> Not with SD card detect.
> 
> So this patch will break those revision C (and below) boards, by
> adding gpio for card detect that does not exists there, no?
> 

No, the card detect line is muxed with DAT3, so it'll work fine on
previous boards that does have card detect.
> Confused,

Tested on all board revisions.

Dinh
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Re: [PATCH 2/3] ARM: dts: socfpga: Add SD card detect

[Dinh Nguyen]

On 8/14/14, 4:01 PM, Dinh Nguyen wrote:
> 
> 
> On 8/14/14, 3:59 PM, Pavel Machek wrote:
>> On Thu 2014-08-14 15:57:52, Dinh Nguyen wrote:
>>>
>>>
>>> On 8/14/14, 1:51 PM, Pavel Machek wrote:
>>>> On Thu 2014-08-14 10:51:30, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
>>>>> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>>>>>
>>>>> Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC
>>>>> card detect.
>>>>
>>>> Are there previous revisions outside Altera?
>>>>
>>>
>>> Not with SD card detect.
>>
>> So this patch will break those revision C (and below) boards, by
>> adding gpio for card detect that does not exists there, no?
>>
> 
> No, the card detect line is muxed with DAT3, so it'll work fine on
> previous boards that does have card detect.

Sorry...i'll work fine on previous boards that does NOT have card detect.

>> Confused,
> 
> Tested on all board revisions.
> 
> Dinh
> 
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Re: [PATCH 2/3] ARM: dts: socfpga: Add SD card detect

[Pavel Machek]

On Thu 2014-08-14 16:01:56, Dinh Nguyen wrote:
> 
> 
> On 8/14/14, 4:01 PM, Dinh Nguyen wrote:
> > 
> > 
> > On 8/14/14, 3:59 PM, Pavel Machek wrote:
> >> On Thu 2014-08-14 15:57:52, Dinh Nguyen wrote:
> >>>
> >>>
> >>> On 8/14/14, 1:51 PM, Pavel Machek wrote:
> >>>> On Thu 2014-08-14 10:51:30, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
> >>>>> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> >>>>>
> >>>>> Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC
> >>>>> card detect.
> >>>>
> >>>> Are there previous revisions outside Altera?
> >>>>
> >>>
> >>> Not with SD card detect.
> >>
> >> So this patch will break those revision C (and below) boards, by
> >> adding gpio for card detect that does not exists there, no?
> >>
> > 
> > No, the card detect line is muxed with DAT3, so it'll work fine on
> > previous boards that does have card detect.
> 
> Sorry...i'll work fine on previous boards that does NOT have card detect.

Thanks for clarifications and sorry for the noise.

Acked-by: Pavel Machek <pavel-ynQEQJNshbs@public.gmane.org>
									Pavel
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[PATCH 3/3] ARM: dts: socfpga: memreserve first 4KB for SMP code

[dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx]

From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to
bring secondary cores online. This patch adds a /memreserve/ section to
reserve the first 4K for the SMP trampoline code.

Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
 arch/arm/boot/dts/socfpga_arria5.dtsi   | 1 +
 arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 468fc4c..73b939e 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -15,6 +15,7 @@
  */
 
 /dts-v1/;
+/memreserve/ 0x00000000 0x0001000;
 #include "socfpga.dtsi"
 
 / {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index 33cad8b..f0785f0 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -16,6 +16,7 @@
  */
 
 /dts-v1/;
+/memreserve/ 0x00000000 0x0001000;
 #include "socfpga.dtsi"
 
 / {
-- 
2.0.3

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Re: [PATCH 3/3] ARM: dts: socfpga: memreserve first 4KB for SMP code

[Pavel Machek]

On Thu 2014-08-14 10:51:31, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> 
> The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to
> bring secondary cores online. This patch adds a /memreserve/ section to
> reserve the first 4K for the SMP trampoline code.
> 
> Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> ---
>  arch/arm/boot/dts/socfpga_arria5.dtsi   | 1 +
>  arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi
> index 468fc4c..73b939e 100644
> --- a/arch/arm/boot/dts/socfpga_arria5.dtsi
> +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
> @@ -15,6 +15,7 @@
>   */
>  
>  /dts-v1/;
> +/memreserve/ 0x00000000 0x0001000;

Actually, comment here explaining that ROM code uses 0x0 for the
trampoline would be nice here... if I understand it correctly.

Thanks,
									Pavel
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Re: [PATCH 3/3] ARM: dts: socfpga: memreserve first 4KB for SMP code

[Dinh Nguyen]

On 8/14/14, 1:54 PM, Pavel Machek wrote:
> On Thu 2014-08-14 10:51:31, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
>> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>>
>> The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to
>> bring secondary cores online. This patch adds a /memreserve/ section to
>> reserve the first 4K for the SMP trampoline code.
>>
>> Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>> ---
>>  arch/arm/boot/dts/socfpga_arria5.dtsi   | 1 +
>>  arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
>>  2 files changed, 2 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi
>> index 468fc4c..73b939e 100644
>> --- a/arch/arm/boot/dts/socfpga_arria5.dtsi
>> +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
>> @@ -15,6 +15,7 @@
>>   */
>>  
>>  /dts-v1/;
>> +/memreserve/ 0x00000000 0x0001000;
> 
> Actually, comment here explaining that ROM code uses 0x0 for the
> trampoline would be nice here... if I understand it correctly.

Sure...I'll add a single line comment.

Dinh
> 
> Thanks,
> 									Pavel
> 
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Re: [PATCH 3/3] ARM: dts: socfpga: memreserve first 4KB for SMP code

[Pavel Machek]

On Thu 2014-08-14 15:56:53, Dinh Nguyen wrote:
> 
> 
> On 8/14/14, 1:54 PM, Pavel Machek wrote:
> > On Thu 2014-08-14 10:51:31, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
> >> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> >>
> >> The SOCFPGA's SMP code uses 0x0 for as the location for the trampoline to
> >> bring secondary cores online. This patch adds a /memreserve/ section to
> >> reserve the first 4K for the SMP trampoline code.
> >>
> >> Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> >> ---
> >>  arch/arm/boot/dts/socfpga_arria5.dtsi   | 1 +
> >>  arch/arm/boot/dts/socfpga_cyclone5.dtsi | 1 +
> >>  2 files changed, 2 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi
> >> index 468fc4c..73b939e 100644
> >> --- a/arch/arm/boot/dts/socfpga_arria5.dtsi
> >> +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
> >> @@ -15,6 +15,7 @@
> >>   */
> >>  
> >>  /dts-v1/;
> >> +/memreserve/ 0x00000000 0x0001000;
> > 
> > Actually, comment here explaining that ROM code uses 0x0 for the
> > trampoline would be nice here... if I understand it correctly.
> 
> Sure...I'll add a single line comment.

Thanks. You can add my acked-by then :-).
									Pavel
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