From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: Soren Brinkmann <soren.brinkmann@xilinx.com>,
Michal Simek <michal.simek@xilinx.com>
Cc: Russell King <linux@arm.linux.org.uk>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-pm@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>
Subject: Re: [PATCH v2 3/9] ARM: zynq: DT: Add DDRC node
Date: Wed, 03 Sep 2014 15:49:47 +0200 [thread overview]
Message-ID: <54071C7B.4090805@linaro.org> (raw)
In-Reply-To: <1409692754-13437-4-git-send-email-soren.brinkmann@xilinx.com>
On 09/02/2014 11:19 PM, Soren Brinkmann wrote:
> Add the DDR controller to the Zynq devicetree.
>
> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> ---
> arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 6cc83d4c6c76..587cadcf7001 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -146,6 +146,11 @@
> cache-level = <2>;
> };
>
> + memory-controller@f8006000 {
> + compatible = "xlnx,zynq-ddrc-a05";
> + reg = <0xf8006000 0x1000>;
> + } ;
> +
> uart0: serial@e0000000 {
> compatible = "xlnx,xuartps", "cdns,uart-r1p8";
> status = "disabled";
>
--
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next prev parent reply other threads:[~2014-09-03 13:49 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-02 21:19 [PATCH v2 0/9] Zynq PM updates Soren Brinkmann
2014-09-02 21:19 ` [PATCH v2 1/9] ARM: zynq: PM: Enable A9 internal clock gating feature Soren Brinkmann
2014-09-02 21:19 ` [PATCH v2 2/9] Documentation: devicetree: Add binding for Synopsys DDR controller Soren Brinkmann
2014-09-02 21:19 ` [PATCH v2 3/9] ARM: zynq: DT: Add DDRC node Soren Brinkmann
2014-09-03 13:49 ` Daniel Lezcano [this message]
[not found] ` <1409692754-13437-1-git-send-email-soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2014-09-02 21:19 ` [PATCH v2 4/9] ARM: zynq: PM: Enable DDR clock stop Soren Brinkmann
[not found] ` <1409692754-13437-5-git-send-email-soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2014-09-04 12:16 ` Daniel Lezcano
2014-09-02 21:19 ` [PATCH v2 5/9] ARM: zynq: Remove invalidate cache for cpu die Soren Brinkmann
2014-09-02 21:19 ` [PATCH v2 6/9] ARM: zynq: cpuidle: Remove pointless code Soren Brinkmann
2014-09-02 21:19 ` [PATCH v2 7/9] ARM: zynq: Synchronise zynq_cpu_die/kill Soren Brinkmann
2014-09-02 21:19 ` [PATCH v2 8/9] ARM: zynq: Remove hotplug.c Soren Brinkmann
2014-09-02 21:19 ` [PATCH v2 9/9] ARM: zynq: Rename 'zynq_platform_cpu_die' Soren Brinkmann
2014-09-15 13:34 ` [PATCH v2 0/9] Zynq PM updates Michal Simek
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