From mboxrd@z Thu Jan 1 00:00:00 1970 From: Srinivas Kandagatla Subject: Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support Date: Tue, 30 Sep 2014 08:44:13 +0100 Message-ID: <542A5F4D.8070407@linaro.org> References: <1411982044-7873-1-git-send-email-srinivas.kandagatla@linaro.org> <1411982092-7922-1-git-send-email-srinivas.kandagatla@linaro.org> <5429DA95.80505@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <5429DA95.80505@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org To: Stephen Boyd , Kumar Gala , devicetree@vger.kernel.org Cc: broonie@kernel.org, lee.jones@linaro.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, arm@kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@sonymobile.com List-Id: devicetree@vger.kernel.org On 29/09/14 23:17, Stephen Boyd wrote: > On 09/29/14 02:14, Srinivas Kandagatla wrote: >> @@ -246,6 +247,24 @@ >> #reset-cells = <1>; >> }; >> >> + apcs: syscon@2011000 { >> + compatible = "syscon"; >> + reg = <0x2011000 0x1000>; >> + }; > > This is actually a clock controller block that hw designers decided was > good place to shove the ipc bits (because there's room!). Can we call it > > l2cc: clock-controller@2011000 { > compatible = "syscon"; > reg = <0x2011000 0x1000>; > }; > yep, I will rename this in next version. > Eventually I'll add the specific krait compatible when we merge krait > clock support: sounds good. --srini > > l2cc: clock-controller@2011000 { > compatible = "qcom,kpss-gcc", "syscon"; > reg = <0x2011000 0x1000>; > clock-output-names = "acpu_l2_aux"; > }; > >> + >> + rpm@108000 { >> + compatible = "qcom,rpm-apq8064"; >> + reg = <0x108000 0x1000>; >> + qcom,ipc = <&apcs 0x8 2>; > > There are actually 3 ipc bits. I guess if we ever have to use the other > two we'll extend this binding to have the other bits specified some > other way? >