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* [PATCH v5 0/6] Add initial support for pinctrl on Exynos7
@ 2014-10-09 13:54 Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 1/6] pinctrl: exynos: Generalize the eint16_31 demux code Abhilash Kesavan
                   ` (6 more replies)
  0 siblings, 7 replies; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-09 13:54 UTC (permalink / raw)
  To: linux-arm-kernel, tomasz.figa, linus.walleij
  Cc: linux-samsung-soc, catalin.marinas, naveenkrishna.ch, robh,
	devicetree

Changes since v4:
	- Rebased over Tomasz Figa's pinctrl clean-up patches[1]

Changes since v3:
	- Changed variable name from exynos_wkup_irq_chip to irq_chip
	- Added acked-by tag from Tomasz Figa

Changes since v2:
	- Added a .irq_chip field to the samsung_pin_bank struct
	- Consolidated the wakeup and gpio irqd_ops

Changes since v1:
	- Marked the newly created irq_chip instances as __initdata
	- Used kmemdup to keep a copy of the irq_chip
	- Change the pinctrl name from sd0_rdqs to sd0_ds as per UM
	- Moved the pinctrl enablement for exynos7 into a separate patch
	- Added tested-by and reviewed-by tags from Thomas Abraham

This series has been tested on linux-next (20141008)
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/ with
the following dependencies and [1].
 
a) Samsung Serial symbol clean-up for exynos7 serial driver enablement (v2)
   http://www.spinics.net/lists/arm-kernel/msg366947.html
   http://www.spinics.net/lists/arm-kernel/msg366948.html
b) "dts, kbuild: Implement support for dtb vendor subdirs" patchset - rebased
   http://comments.gmane.org/gmane.linux.kbuild.devel/12131
c) "arch: arm64: enable support for Samsung Exynos7 SoC" patchset (v5) - rebased
   http://www.spinics.net/lists/arm-kernel/msg364014.html

[1] https://lkml.org/lkml/2014/10/2/476

Abhilash Kesavan (3):
  pinctrl: exynos: Generalize the eint16_31 demux code
  pinctrl: exynos: Consolidate irq domain callbacks
  pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts

Naveen Krishna Ch (3):
  pinctrl: exynos: Add initial driver data for Exynos7
  arm64: dts: Add initial pinctrl support to EXYNOS7
  arm64: exynos: Enable pinctrl support for Exynos7

 .../bindings/pinctrl/samsung-pinctrl.txt           |    3 +
 arch/arm64/Kconfig                                 |    2 +
 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi    |  560 ++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos7.dtsi            |   66 +++
 drivers/pinctrl/samsung/pinctrl-exynos.c           |  188 +++++--
 drivers/pinctrl/samsung/pinctrl-exynos.h           |    3 +
 drivers/pinctrl/samsung/pinctrl-samsung.c          |    2 +
 drivers/pinctrl/samsung/pinctrl-samsung.h          |    3 +
 8 files changed, 791 insertions(+), 36 deletions(-)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi

-- 
1.7.9.5

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [PATCH v5 1/6] pinctrl: exynos: Generalize the eint16_31 demux code
  2014-10-09 13:54 [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Abhilash Kesavan
@ 2014-10-09 13:54 ` Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 2/6] pinctrl: exynos: Consolidate irq domain callbacks Abhilash Kesavan
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-09 13:54 UTC (permalink / raw)
  To: linux-arm-kernel, tomasz.figa, linus.walleij
  Cc: linux-samsung-soc, catalin.marinas, naveenkrishna.ch, robh,
	devicetree

The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external
interrupt pending status and mask registers. So this function is not extensible
for Exynos7 SoC which has these registers at different offsets. Generalize
the exynos_irq_demux_eint16_31 function by using the pending/mask register
offset values from the exynos_irq_chip structure. This is done by adding a
irq_chip field to the samsung_pin_bank struct.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/pinctrl/samsung/pinctrl-exynos.c  |   14 ++++++++++----
 drivers/pinctrl/samsung/pinctrl-samsung.h |    2 ++
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 6190106..0cca117 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -260,7 +260,7 @@ static int exynos_gpio_irq_map(struct irq_domain *h, unsigned int virq,
 	struct samsung_pin_bank *b = h->host_data;
 
 	irq_set_chip_data(virq, b);
-	irq_set_chip_and_handler(virq, &exynos_gpio_irq_chip.chip,
+	irq_set_chip_and_handler(virq, &b->irq_chip->chip,
 					handle_level_irq);
 	set_irq_flags(virq, IRQF_VALID);
 	return 0;
@@ -343,6 +343,8 @@ static int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d)
 			ret = -ENOMEM;
 			goto err_domains;
 		}
+
+		bank->irq_chip = &exynos_gpio_irq_chip;
 	}
 
 	return 0;
@@ -444,9 +446,9 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 
 	for (i = 0; i < eintd->nr_banks; ++i) {
 		struct samsung_pin_bank *b = eintd->banks[i];
-		pend = readl(d->virt_base + EXYNOS_WKUP_EPEND_OFFSET
+		pend = readl(d->virt_base + b->irq_chip->eint_pend
 				+ b->eint_offset);
-		mask = readl(d->virt_base + EXYNOS_WKUP_EMASK_OFFSET
+		mask = readl(d->virt_base + b->irq_chip->eint_mask
 				+ b->eint_offset);
 		exynos_irq_demux_eint(pend & ~mask, b->irq_domain);
 	}
@@ -457,7 +459,9 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 static int exynos_wkup_irq_map(struct irq_domain *h, unsigned int virq,
 					irq_hw_number_t hw)
 {
-	irq_set_chip_and_handler(virq, &exynos_wkup_irq_chip.chip,
+	struct samsung_pin_bank *b = h->host_data;
+
+	irq_set_chip_and_handler(virq, &b->irq_chip->chip,
 					handle_level_irq);
 	irq_set_chip_data(virq, h->host_data);
 	set_irq_flags(virq, IRQF_VALID);
@@ -509,6 +513,8 @@ static int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
 			return -ENXIO;
 		}
 
+		bank->irq_chip = &exynos_wkup_irq_chip;
+
 		if (!of_find_property(bank->of_node, "interrupts", NULL)) {
 			bank->eint_type = EINT_TYPE_WKUP_MUX;
 			++muxed_banks;
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index ec43b7d..3076b8b 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -151,6 +151,7 @@ struct samsung_pin_bank_data {
  * @irq_domain: IRQ domain of the bank.
  * @gpio_chip: GPIO chip of the bank.
  * @grange: linux gpio pin range supported by this bank.
+ * @irq_chip: link to irq chip for external gpio and wakeup interrupts.
  * @slock: spinlock protecting bank registers
  * @pm_save: saved register values during suspend
  */
@@ -171,6 +172,7 @@ struct samsung_pin_bank {
 	struct irq_domain *irq_domain;
 	struct gpio_chip gpio_chip;
 	struct pinctrl_gpio_range grange;
+	struct exynos_irq_chip *irq_chip;
 	spinlock_t slock;
 
 	u32 pm_save[PINCFG_TYPE_NUM + 1]; /* +1 to handle double CON registers*/
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH v5 2/6] pinctrl: exynos: Consolidate irq domain callbacks
  2014-10-09 13:54 [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 1/6] pinctrl: exynos: Generalize the eint16_31 demux code Abhilash Kesavan
@ 2014-10-09 13:54 ` Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 3/6] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts Abhilash Kesavan
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-09 13:54 UTC (permalink / raw)
  To: linux-arm-kernel, tomasz.figa, linus.walleij
  Cc: linux-samsung-soc, catalin.marinas, naveenkrishna.ch, robh,
	devicetree

Adding a irq_chip field to the samsung_pin_bank struct helps in
consolidating the irq domain callbacks for external gpio and wakeup
interrupt controllers. The exynos_wkup_irqd_ops and exynos_gpio_irqd_ops
have now been merged into a single exynos_eint_irqd_ops.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/pinctrl/samsung/pinctrl-exynos.c |   32 ++++++------------------------
 1 file changed, 6 insertions(+), 26 deletions(-)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 0cca117..f7ac9c7 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -254,7 +254,7 @@ static struct exynos_irq_chip exynos_gpio_irq_chip = {
 	.eint_pend = EXYNOS_GPIO_EPEND_OFFSET,
 };
 
-static int exynos_gpio_irq_map(struct irq_domain *h, unsigned int virq,
+static int exynos_eint_irq_map(struct irq_domain *h, unsigned int virq,
 					irq_hw_number_t hw)
 {
 	struct samsung_pin_bank *b = h->host_data;
@@ -267,10 +267,10 @@ static int exynos_gpio_irq_map(struct irq_domain *h, unsigned int virq,
 }
 
 /*
- * irq domain callbacks for external gpio interrupt controller.
+ * irq domain callbacks for external gpio and wakeup interrupt controllers.
  */
-static const struct irq_domain_ops exynos_gpio_irqd_ops = {
-	.map	= exynos_gpio_irq_map,
+static const struct irq_domain_ops exynos_eint_irqd_ops = {
+	.map	= exynos_eint_irq_map,
 	.xlate	= irq_domain_xlate_twocell,
 };
 
@@ -329,7 +329,7 @@ static int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d)
 		if (bank->eint_type != EINT_TYPE_GPIO)
 			continue;
 		bank->irq_domain = irq_domain_add_linear(bank->of_node,
-				bank->nr_pins, &exynos_gpio_irqd_ops, bank);
+				bank->nr_pins, &exynos_eint_irqd_ops, bank);
 		if (!bank->irq_domain) {
 			dev_err(dev, "gpio irq domain add failed\n");
 			ret = -ENXIO;
@@ -456,26 +456,6 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 	chained_irq_exit(chip, desc);
 }
 
-static int exynos_wkup_irq_map(struct irq_domain *h, unsigned int virq,
-					irq_hw_number_t hw)
-{
-	struct samsung_pin_bank *b = h->host_data;
-
-	irq_set_chip_and_handler(virq, &b->irq_chip->chip,
-					handle_level_irq);
-	irq_set_chip_data(virq, h->host_data);
-	set_irq_flags(virq, IRQF_VALID);
-	return 0;
-}
-
-/*
- * irq domain callbacks for external wakeup interrupt controller.
- */
-static const struct irq_domain_ops exynos_wkup_irqd_ops = {
-	.map	= exynos_wkup_irq_map,
-	.xlate	= irq_domain_xlate_twocell,
-};
-
 /*
  * exynos_eint_wkup_init() - setup handling of external wakeup interrupts.
  * @d: driver data of samsung pinctrl driver.
@@ -507,7 +487,7 @@ static int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
 			continue;
 
 		bank->irq_domain = irq_domain_add_linear(bank->of_node,
-				bank->nr_pins, &exynos_wkup_irqd_ops, bank);
+				bank->nr_pins, &exynos_eint_irqd_ops, bank);
 		if (!bank->irq_domain) {
 			dev_err(dev, "wkup irq domain add failed\n");
 			return -ENXIO;
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH v5 3/6] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
  2014-10-09 13:54 [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 1/6] pinctrl: exynos: Generalize the eint16_31 demux code Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 2/6] pinctrl: exynos: Consolidate irq domain callbacks Abhilash Kesavan
@ 2014-10-09 13:54 ` Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 4/6] pinctrl: exynos: Add initial driver data for Exynos7 Abhilash Kesavan
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-09 13:54 UTC (permalink / raw)
  To: linux-arm-kernel, tomasz.figa, linus.walleij
  Cc: linux-samsung-soc, catalin.marinas, naveenkrishna.ch, robh,
	devicetree

Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip
selection is now based on the wakeup interrupt controller compatible string.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
 .../bindings/pinctrl/samsung-pinctrl.txt           |    2 +
 drivers/pinctrl/samsung/pinctrl-exynos.c           |   45 +++++++++++++++-----
 drivers/pinctrl/samsung/pinctrl-exynos.h           |    3 ++
 3 files changed, 40 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index e82aaf4..f80519a 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -136,6 +136,8 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
        found on Samsung S3C64xx SoCs,
      - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
        found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
+     - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
+       found on Samsung Exynos7 SoC.
    - interrupt-parent: phandle of the interrupt parent to which the external
      wakeup interrupts are forwarded to.
    - interrupts: interrupt used by multiplexed wakeup interrupts.
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index f7ac9c7..e8f8f16 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -56,12 +56,6 @@ static const struct samsung_pin_bank_type bank_type_alive = {
 	.reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
 };
 
-/* list of external wakeup controllers supported */
-static const struct of_device_id exynos_wkup_irq_ids[] = {
-	{ .compatible = "samsung,exynos4210-wakeup-eint", },
-	{ }
-};
-
 static void exynos_irq_mask(struct irq_data *irqd)
 {
 	struct irq_chip *chip = irq_data_get_irq_chip(irqd);
@@ -384,9 +378,9 @@ static int exynos_wkup_irq_set_wake(struct irq_data *irqd, unsigned int on)
 /*
  * irq_chip for wakeup interrupts
  */
-static struct exynos_irq_chip exynos_wkup_irq_chip = {
+static struct exynos_irq_chip exynos4210_wkup_irq_chip __initdata = {
 	.chip = {
-		.name = "exynos_wkup_irq_chip",
+		.name = "exynos4210_wkup_irq_chip",
 		.irq_unmask = exynos_irq_unmask,
 		.irq_mask = exynos_irq_mask,
 		.irq_ack = exynos_irq_ack,
@@ -400,6 +394,31 @@ static struct exynos_irq_chip exynos_wkup_irq_chip = {
 	.eint_pend = EXYNOS_WKUP_EPEND_OFFSET,
 };
 
+static struct exynos_irq_chip exynos7_wkup_irq_chip __initdata = {
+	.chip = {
+		.name = "exynos7_wkup_irq_chip",
+		.irq_unmask = exynos_irq_unmask,
+		.irq_mask = exynos_irq_mask,
+		.irq_ack = exynos_irq_ack,
+		.irq_set_type = exynos_irq_set_type,
+		.irq_set_wake = exynos_wkup_irq_set_wake,
+		.irq_request_resources = exynos_irq_request_resources,
+		.irq_release_resources = exynos_irq_release_resources,
+	},
+	.eint_con = EXYNOS7_WKUP_ECON_OFFSET,
+	.eint_mask = EXYNOS7_WKUP_EMASK_OFFSET,
+	.eint_pend = EXYNOS7_WKUP_EPEND_OFFSET,
+};
+
+/* list of external wakeup controllers supported */
+static const struct of_device_id exynos_wkup_irq_ids[] = {
+	{ .compatible = "samsung,exynos4210-wakeup-eint",
+			.data = &exynos4210_wkup_irq_chip },
+	{ .compatible = "samsung,exynos7-wakeup-eint",
+			.data = &exynos7_wkup_irq_chip },
+	{ }
+};
+
 /* interrupt handler for wakeup interrupts 0..15 */
 static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
 {
@@ -468,12 +487,18 @@ static int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
 	struct samsung_pin_bank *bank;
 	struct exynos_weint_data *weint_data;
 	struct exynos_muxed_weint_data *muxed_data;
+	struct exynos_irq_chip *irq_chip;
 	unsigned int muxed_banks = 0;
 	unsigned int i;
 	int idx, irq;
 
 	for_each_child_of_node(dev->of_node, np) {
-		if (of_match_node(exynos_wkup_irq_ids, np)) {
+		const struct of_device_id *match;
+
+		match = of_match_node(exynos_wkup_irq_ids, np);
+		if (match) {
+			irq_chip = kmemdup(match->data,
+				sizeof(*irq_chip), GFP_KERNEL);
 			wkup_np = np;
 			break;
 		}
@@ -493,7 +518,7 @@ static int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
 			return -ENXIO;
 		}
 
-		bank->irq_chip = &exynos_wkup_irq_chip;
+		bank->irq_chip = irq_chip;
 
 		if (!of_find_property(bank->of_node, "interrupts", NULL)) {
 			bank->eint_type = EINT_TYPE_WKUP_MUX;
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h b/drivers/pinctrl/samsung/pinctrl-exynos.h
index 3c91c35..0f0f7ce 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -25,6 +25,9 @@
 #define EXYNOS_WKUP_ECON_OFFSET		0xE00
 #define EXYNOS_WKUP_EMASK_OFFSET	0xF00
 #define EXYNOS_WKUP_EPEND_OFFSET	0xF40
+#define EXYNOS7_WKUP_ECON_OFFSET	0x700
+#define EXYNOS7_WKUP_EMASK_OFFSET	0x900
+#define EXYNOS7_WKUP_EPEND_OFFSET	0xA00
 #define EXYNOS_SVC_OFFSET		0xB08
 #define EXYNOS_EINT_FUNC		0xF
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH v5 4/6] pinctrl: exynos: Add initial driver data for Exynos7
  2014-10-09 13:54 [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Abhilash Kesavan
                   ` (2 preceding siblings ...)
  2014-10-09 13:54 ` [PATCH v5 3/6] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts Abhilash Kesavan
@ 2014-10-09 13:54 ` Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 5/6] arm64: dts: Add initial pinctrl support to EXYNOS7 Abhilash Kesavan
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-09 13:54 UTC (permalink / raw)
  To: linux-arm-kernel, tomasz.figa, linus.walleij
  Cc: linux-samsung-soc, catalin.marinas, naveenkrishna.ch, robh,
	devicetree

From: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>

This patch adds initial driver data for Exynos7 pinctrl support.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
 .../bindings/pinctrl/samsung-pinctrl.txt           |    1 +
 drivers/pinctrl/samsung/pinctrl-exynos.c           |  105 ++++++++++++++++++++
 drivers/pinctrl/samsung/pinctrl-samsung.c          |    2 +
 drivers/pinctrl/samsung/pinctrl-samsung.h          |    1 +
 4 files changed, 109 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index f80519a..8425838 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -18,6 +18,7 @@ Required Properties:
   - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
   - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
   - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
+  - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
 
 - reg: Base address of the pin controller hardware module and length of
   the address space it occupies.
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index e8f8f16..fbeff99 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1164,3 +1164,108 @@ const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
 		.eint_gpio_init = exynos_eint_gpio_init,
 	},
 };
+
+/* pin banks of exynos7 pin-controller - ALIVE */
+static const struct samsung_pin_bank_data exynos7_pin_banks0[] __initconst = {
+	EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
+	EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
+	EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
+	EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+};
+
+/* pin banks of exynos7 pin-controller - BUS0 */
+static const struct samsung_pin_bank_data exynos7_pin_banks1[] __initconst = {
+	EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
+	EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc0", 0x04),
+	EXYNOS_PIN_BANK_EINTG(2, 0x040, "gpc1", 0x08),
+	EXYNOS_PIN_BANK_EINTG(6, 0x060, "gpc2", 0x0c),
+	EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpc3", 0x10),
+	EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14),
+	EXYNOS_PIN_BANK_EINTG(6, 0x0c0, "gpd1", 0x18),
+	EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpd2", 0x1c),
+	EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpd4", 0x20),
+	EXYNOS_PIN_BANK_EINTG(4, 0x120, "gpd5", 0x24),
+	EXYNOS_PIN_BANK_EINTG(6, 0x140, "gpd6", 0x28),
+	EXYNOS_PIN_BANK_EINTG(3, 0x160, "gpd7", 0x2c),
+	EXYNOS_PIN_BANK_EINTG(2, 0x180, "gpd8", 0x30),
+	EXYNOS_PIN_BANK_EINTG(2, 0x1a0, "gpg0", 0x34),
+	EXYNOS_PIN_BANK_EINTG(4, 0x1c0, "gpg3", 0x38),
+};
+
+/* pin banks of exynos7 pin-controller - NFC */
+static const struct samsung_pin_bank_data exynos7_pin_banks2[] __initconst = {
+	EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - TOUCH */
+static const struct samsung_pin_bank_data exynos7_pin_banks3[] __initconst = {
+	EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FF */
+static const struct samsung_pin_bank_data exynos7_pin_banks4[] __initconst = {
+	EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpg4", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - ESE */
+static const struct samsung_pin_bank_data exynos7_pin_banks5[] __initconst = {
+	EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpv7", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FSYS0 */
+static const struct samsung_pin_bank_data exynos7_pin_banks6[] __initconst = {
+	EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpr4", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FSYS1 */
+static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
+	EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpr0", 0x00),
+	EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpr1", 0x04),
+	EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr2", 0x08),
+	EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
+};
+
+const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
+	{
+		/* pin-controller instance 0 Alive data */
+		.pin_banks	= exynos7_pin_banks0,
+		.nr_banks	= ARRAY_SIZE(exynos7_pin_banks0),
+		.eint_gpio_init = exynos_eint_gpio_init,
+		.eint_wkup_init = exynos_eint_wkup_init,
+	}, {
+		/* pin-controller instance 1 BUS0 data */
+		.pin_banks	= exynos7_pin_banks1,
+		.nr_banks	= ARRAY_SIZE(exynos7_pin_banks1),
+		.eint_gpio_init = exynos_eint_gpio_init,
+	}, {
+		/* pin-controller instance 2 NFC data */
+		.pin_banks	= exynos7_pin_banks2,
+		.nr_banks	= ARRAY_SIZE(exynos7_pin_banks2),
+		.eint_gpio_init = exynos_eint_gpio_init,
+	}, {
+		/* pin-controller instance 3 TOUCH data */
+		.pin_banks	= exynos7_pin_banks3,
+		.nr_banks	= ARRAY_SIZE(exynos7_pin_banks3),
+		.eint_gpio_init = exynos_eint_gpio_init,
+	}, {
+		/* pin-controller instance 4 FF data */
+		.pin_banks	= exynos7_pin_banks4,
+		.nr_banks	= ARRAY_SIZE(exynos7_pin_banks4),
+		.eint_gpio_init = exynos_eint_gpio_init,
+	}, {
+		/* pin-controller instance 5 ESE data */
+		.pin_banks	= exynos7_pin_banks5,
+		.nr_banks	= ARRAY_SIZE(exynos7_pin_banks5),
+		.eint_gpio_init = exynos_eint_gpio_init,
+	}, {
+		/* pin-controller instance 6 FSYS0 data */
+		.pin_banks	= exynos7_pin_banks6,
+		.nr_banks	= ARRAY_SIZE(exynos7_pin_banks6),
+		.eint_gpio_init = exynos_eint_gpio_init,
+	}, {
+		/* pin-controller instance 7 FSYS1 data */
+		.pin_banks	= exynos7_pin_banks7,
+		.nr_banks	= ARRAY_SIZE(exynos7_pin_banks7),
+		.eint_gpio_init = exynos_eint_gpio_init,
+	},
+};
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 7145601..d28d5b3 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -1238,6 +1238,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
 		.data = (void *)exynos5420_pin_ctrl },
 	{ .compatible = "samsung,s5pv210-pinctrl",
 		.data = (void *)s5pv210_pin_ctrl },
+	{ .compatible = "samsung,exynos7-pinctrl",
+		.data = (void *)exynos7_pin_ctrl },
 #endif
 #ifdef CONFIG_PINCTRL_S3C64XX
 	{ .compatible = "samsung,s3c64xx-pinctrl",
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index 3076b8b..29004be 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -270,6 +270,7 @@ extern const struct samsung_pin_ctrl exynos4x12_pin_ctrl[];
 extern const struct samsung_pin_ctrl exynos5250_pin_ctrl[];
 extern const struct samsung_pin_ctrl exynos5260_pin_ctrl[];
 extern const struct samsung_pin_ctrl exynos5420_pin_ctrl[];
+extern const struct samsung_pin_ctrl exynos7_pin_ctrl[];
 extern const struct samsung_pin_ctrl s3c64xx_pin_ctrl[];
 extern const struct samsung_pin_ctrl s3c2412_pin_ctrl[];
 extern const struct samsung_pin_ctrl s3c2416_pin_ctrl[];
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH v5 5/6] arm64: dts: Add initial pinctrl support to EXYNOS7
  2014-10-09 13:54 [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Abhilash Kesavan
                   ` (3 preceding siblings ...)
  2014-10-09 13:54 ` [PATCH v5 4/6] pinctrl: exynos: Add initial driver data for Exynos7 Abhilash Kesavan
@ 2014-10-09 13:54 ` Abhilash Kesavan
  2014-10-09 13:54 ` [PATCH v5 6/6] arm64: exynos: Enable pinctrl support for Exynos7 Abhilash Kesavan
  2014-10-11 18:57 ` [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Tomasz Figa
  6 siblings, 0 replies; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-09 13:54 UTC (permalink / raw)
  To: linux-arm-kernel, tomasz.figa, linus.walleij
  Cc: linux-samsung-soc, catalin.marinas, naveenkrishna.ch, robh,
	devicetree

From: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>

Add initial pin configuration nodes for EXYNOS7.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi |  560 +++++++++++++++++++++++
 arch/arm64/boot/dts/exynos/exynos7.dtsi         |   66 +++
 2 files changed, 626 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
new file mode 100644
index 0000000..c7c41c1
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -0,0 +1,560 @@
+/*
+ * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
+ * device tree nodes in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+&pinctrl_alive {
+	gpa0: gpa0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		interrupt-parent = <&gic>;
+		#interrupt-cells = <2>;
+		interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+			     <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>;
+	};
+
+	gpa1: gpa1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		interrupt-parent = <&gic>;
+		#interrupt-cells = <2>;
+		interrupts = <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+			     <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
+	};
+
+	gpa2: gpa2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpa3: gpa3 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+};
+
+&pinctrl_bus0 {
+	gpb0: gpb0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpc0: gpc0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpc1: gpc1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpc2: gpc2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpc3: gpc3 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd0: gpd0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd1: gpd1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd2: gpd2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd4: gpd4 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd5: gpd5 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd6: gpd6 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd7: gpd7 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd8: gpd8 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpg0: gpg0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpg3: gpg3 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	hs_i2c10_bus: hs-i2c10-bus {
+		samsung,pins = "gpb0-1", "gpb0-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c11_bus: hs-i2c11-bus {
+		samsung,pins = "gpb0-3", "gpb0-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c2_bus: hs-i2c2-bus {
+		samsung,pins = "gpd0-3", "gpd0-2";
+		samsung,pin-function = <3>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart0_data: uart0-data {
+		samsung,pins = "gpd0-0", "gpd0-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart0_fctl: uart0-fctl {
+		samsung,pins = "gpd0-2", "gpd0-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart2_data: uart2-data {
+		samsung,pins = "gpd1-4", "gpd1-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c3_bus: hs-i2c3-bus {
+		samsung,pins = "gpd1-3", "gpd1-2";
+		samsung,pin-function = <3>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart1_data: uart1-data {
+		samsung,pins = "gpd1-0", "gpd1-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart1_fctl: uart1-fctl {
+		samsung,pins = "gpd1-2", "gpd1-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c0_bus: hs-i2c0-bus {
+		samsung,pins = "gpd2-1", "gpd2-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c1_bus: hs-i2c1-bus {
+		samsung,pins = "gpd2-3", "gpd2-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c9_bus: hs-i2c9-bus {
+		samsung,pins = "gpd2-7", "gpd2-6";
+		samsung,pin-function = <3>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c8_bus: hs-i2c8-bus {
+		samsung,pins = "gpd5-3", "gpd5-2";
+		samsung,pin-function = <3>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart3_data: uart3-data {
+		samsung,pins = "gpd5-0", "gpd5-1";
+		samsung,pin-function = <3>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	spi2_bus: spi2-bus {
+		samsung,pins = "gpd5-0", "gpd5-1", "gpd5-2", "gpd5-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	spi1_bus: spi1-bus {
+		samsung,pins = "gpd6-2", "gpd6-3", "gpd6-4", "gpd6-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	spi0_bus: spi0-bus {
+		samsung,pins = "gpd8-0", "gpd8-1", "gpd6-0", "gpd6-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c4_bus: hs-i2c4-bus {
+		samsung,pins = "gpg3-1", "gpg3-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+
+	hs_i2c5_bus: hs-i2c5-bus {
+		samsung,pins = "gpg3-3", "gpg3-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&pinctrl_nfc {
+	gpj0: gpj0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	hs_i2c6_bus: hs-i2c6-bus {
+		samsung,pins = "gpj0-1", "gpj0-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&pinctrl_touch {
+	gpj1: gpj1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	hs_i2c7_bus: hs-i2c7-bus {
+		samsung,pins = "gpj1-1", "gpj1-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&pinctrl_ff {
+	gpg4: gpg4 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	spi3_bus: spi3-bus {
+		samsung,pins = "gpg4-0", "gpg4-1", "gpg4-2", "gpg4-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&pinctrl_ese {
+	gpv7: gpv7 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	spi4_bus: spi4-bus {
+		samsung,pins = "gpv7-0", "gpv7-1", "gpv7-2", "gpv7-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&pinctrl_fsys0 {
+	gpr4: gpr4 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	sd2_clk: sd2-clk {
+		samsung,pins = "gpr4-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_cmd: sd2-cmd {
+		samsung,pins = "gpr4-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_cd: sd2-cd {
+		samsung,pins = "gpr4-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_bus1: sd2-bus-width1 {
+		samsung,pins = "gpr4-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_bus4: sd2-bus-width4 {
+		samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <3>;
+	};
+};
+
+&pinctrl_fsys1 {
+	gpr0: gpr0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpr1: gpr1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpr2: gpr2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpr3: gpr3 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	sd0_clk: sd0-clk {
+		samsung,pins = "gpr0-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_cmd: sd0-cmd {
+		samsung,pins = "gpr0-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_ds: sd0-ds {
+		samsung,pins = "gpr0-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <1>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_qrdy: sd0-qrdy {
+		samsung,pins = "gpr0-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <1>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_bus1: sd0-bus-width1 {
+		samsung,pins = "gpr1-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_bus4: sd0-bus-width4 {
+		samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_bus8: sd0-bus-width8 {
+		samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd1_clk: sd1-clk {
+		samsung,pins = "gpr2-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <2>;
+	};
+
+	sd1_cmd: sd1-cmd {
+		samsung,pins = "gpr2-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <2>;
+	};
+
+	sd1_ds: sd1-ds {
+		samsung,pins = "gpr2-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <1>;
+		samsung,pin-drv = <6>;
+	};
+
+	sd1_qrdy: sd1-qrdy {
+		samsung,pins = "gpr2-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <1>;
+		samsung,pin-drv = <6>;
+	};
+
+	sd1_int: sd1-int {
+		samsung,pins = "gpr2-4";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <1>;
+		samsung,pin-drv = <6>;
+	};
+
+	sd1_bus1: sd1-bus-width1 {
+		samsung,pins = "gpr3-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <2>;
+	};
+
+	sd1_bus4: sd1-bus-width4 {
+		samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <2>;
+	};
+
+	sd1_bus8: sd1-bus-width8 {
+		samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <2>;
+	};
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index a326fbf..ce221ac 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -17,6 +17,17 @@
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	aliases {
+		pinctrl0 = &pinctrl_alive;
+		pinctrl1 = &pinctrl_bus0;
+		pinctrl2 = &pinctrl_nfc;
+		pinctrl3 = &pinctrl_touch;
+		pinctrl4 = &pinctrl_ff;
+		pinctrl5 = &pinctrl_ese;
+		pinctrl6 = &pinctrl_fsys0;
+		pinctrl7 = &pinctrl_fsys1;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -172,6 +183,59 @@
 			status = "disabled";
 		};
 
+		pinctrl_alive: pinctrl@10580000 {
+			compatible = "samsung,exynos7-pinctrl";
+			reg = <0x10580000 0x1000>;
+
+			wakeup-interrupt-controller {
+				compatible = "samsung,exynos7-wakeup-eint";
+				interrupt-parent = <&gic>;
+				interrupts = <0 16 0>;
+			};
+		};
+
+		pinctrl_bus0: pinctrl@13470000 {
+			compatible = "samsung,exynos7-pinctrl";
+			reg = <0x13470000 0x1000>;
+			interrupts = <0 383 0>;
+		};
+
+		pinctrl_nfc: pinctrl@14cd0000 {
+			compatible = "samsung,exynos7-pinctrl";
+			reg = <0x14cd0000 0x1000>;
+			interrupts = <0 473 0>;
+		};
+
+		pinctrl_touch: pinctrl@14ce0000 {
+			compatible = "samsung,exynos7-pinctrl";
+			reg = <0x14ce0000 0x1000>;
+			interrupts = <0 474 0>;
+		};
+
+		pinctrl_ff: pinctrl@14c90000 {
+			compatible = "samsung,exynos7-pinctrl";
+			reg = <0x14c90000 0x1000>;
+			interrupts = <0 475 0>;
+		};
+
+		pinctrl_ese: pinctrl@14ca0000 {
+			compatible = "samsung,exynos7-pinctrl";
+			reg = <0x14ca0000 0x1000>;
+			interrupts = <0 476 0>;
+		};
+
+		pinctrl_fsys0: pinctrl@10e60000 {
+			compatible = "samsung,exynos7-pinctrl";
+			reg = <0x10e60000 0x1000>;
+			interrupts = <0 221 0>;
+		};
+
+		pinctrl_fsys1: pinctrl@15690000 {
+			compatible = "samsung,exynos7-pinctrl";
+			reg = <0x15690000 0x1000>;
+			interrupts = <0 203 0>;
+		};
+
 		timer {
 			compatible = "arm,armv8-timer";
 			interrupts = <1 13 0xff01>,
@@ -181,3 +245,5 @@
 		};
 	};
 };
+
+#include "exynos7-pinctrl.dtsi"
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH v5 6/6] arm64: exynos: Enable pinctrl support for Exynos7
  2014-10-09 13:54 [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Abhilash Kesavan
                   ` (4 preceding siblings ...)
  2014-10-09 13:54 ` [PATCH v5 5/6] arm64: dts: Add initial pinctrl support to EXYNOS7 Abhilash Kesavan
@ 2014-10-09 13:54 ` Abhilash Kesavan
  2014-10-11 18:57 ` [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Tomasz Figa
  6 siblings, 0 replies; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-09 13:54 UTC (permalink / raw)
  To: linux-arm-kernel, tomasz.figa, linus.walleij
  Cc: linux-samsung-soc, catalin.marinas, naveenkrishna.ch, robh,
	devicetree

From: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>

Enable pinctrl support for exynos7 SoCs.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm64/Kconfig |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 56e5b7c..f9c42fa 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -155,6 +155,8 @@ config ARCH_EXYNOS7
 	bool "ARMv8 based Samsung Exynos7"
 	select ARCH_EXYNOS
 	select COMMON_CLK_SAMSUNG
+	select PINCTRL
+	select PINCTRL_EXYNOS
 	help
 	  This enables support for Samsung Exynos7 SoC family
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* Re: [PATCH v5 0/6] Add initial support for pinctrl on Exynos7
  2014-10-09 13:54 [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Abhilash Kesavan
                   ` (5 preceding siblings ...)
  2014-10-09 13:54 ` [PATCH v5 6/6] arm64: exynos: Enable pinctrl support for Exynos7 Abhilash Kesavan
@ 2014-10-11 18:57 ` Tomasz Figa
  2014-10-20 14:01   ` Abhilash Kesavan
  6 siblings, 1 reply; 13+ messages in thread
From: Tomasz Figa @ 2014-10-11 18:57 UTC (permalink / raw)
  To: Abhilash Kesavan, linux-arm-kernel, linus.walleij
  Cc: linux-samsung-soc, catalin.marinas, naveenkrishna.ch, robh,
	devicetree

Abhilash, Linus,

On 09.10.2014 15:54, Abhilash Kesavan wrote:
> Changes since v4:
> 	- Rebased over Tomasz Figa's pinctrl clean-up patches[1]
> 
> Changes since v3:
> 	- Changed variable name from exynos_wkup_irq_chip to irq_chip
> 	- Added acked-by tag from Tomasz Figa
> 
> Changes since v2:
> 	- Added a .irq_chip field to the samsung_pin_bank struct
> 	- Consolidated the wakeup and gpio irqd_ops
> 
> Changes since v1:
> 	- Marked the newly created irq_chip instances as __initdata
> 	- Used kmemdup to keep a copy of the irq_chip
> 	- Change the pinctrl name from sd0_rdqs to sd0_ds as per UM
> 	- Moved the pinctrl enablement for exynos7 into a separate patch
> 	- Added tested-by and reviewed-by tags from Thomas Abraham
> 
> This series has been tested on linux-next (20141008)
> https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/ with
> the following dependencies and [1].
>  
> a) Samsung Serial symbol clean-up for exynos7 serial driver enablement (v2)
>    http://www.spinics.net/lists/arm-kernel/msg366947.html
>    http://www.spinics.net/lists/arm-kernel/msg366948.html
> b) "dts, kbuild: Implement support for dtb vendor subdirs" patchset - rebased
>    http://comments.gmane.org/gmane.linux.kbuild.devel/12131
> c) "arch: arm64: enable support for Samsung Exynos7 SoC" patchset (v5) - rebased
>    http://www.spinics.net/lists/arm-kernel/msg364014.html
> 
> [1] https://lkml.org/lkml/2014/10/2/476
> 
> Abhilash Kesavan (3):
>   pinctrl: exynos: Generalize the eint16_31 demux code
>   pinctrl: exynos: Consolidate irq domain callbacks
>   pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
> 
> Naveen Krishna Ch (3):
>   pinctrl: exynos: Add initial driver data for Exynos7
>   arm64: dts: Add initial pinctrl support to EXYNOS7
>   arm64: exynos: Enable pinctrl support for Exynos7
> 
>  .../bindings/pinctrl/samsung-pinctrl.txt           |    3 +
>  arch/arm64/Kconfig                                 |    2 +
>  arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi    |  560 ++++++++++++++++++++
>  arch/arm64/boot/dts/exynos/exynos7.dtsi            |   66 +++
>  drivers/pinctrl/samsung/pinctrl-exynos.c           |  188 +++++--
>  drivers/pinctrl/samsung/pinctrl-exynos.h           |    3 +
>  drivers/pinctrl/samsung/pinctrl-samsung.c          |    2 +
>  drivers/pinctrl/samsung/pinctrl-samsung.h          |    3 +
>  8 files changed, 791 insertions(+), 36 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> 

No further comments from me. Thanks Abhilash for addressing all of them.

Linus, feel free to apply this series with my ACK (which seems to be
already present in all patches).

Best regards,
Tomasz

^ permalink raw reply	[flat|nested] 13+ messages in thread
* Re: [PATCH v5 0/6] Add initial support for pinctrl on Exynos7
  2014-10-11 18:57 ` [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Tomasz Figa
@ 2014-10-20 14:01   ` Abhilash Kesavan
  2014-10-24 12:01     ` Linus Walleij
  0 siblings, 1 reply; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-20 14:01 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-arm-kernel, Catalin Marinas, devicetree, linux-samsung-soc,
	robh@kernel.org, Naveen Krishna, Tomasz Figa

Hi Linus,

On Sun, Oct 12, 2014 at 12:27 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> Abhilash, Linus,
>
> On 09.10.2014 15:54, Abhilash Kesavan wrote:
>> Changes since v4:
>>       - Rebased over Tomasz Figa's pinctrl clean-up patches[1]
>>
>> Changes since v3:
>>       - Changed variable name from exynos_wkup_irq_chip to irq_chip
>>       - Added acked-by tag from Tomasz Figa
>>
>> Changes since v2:
>>       - Added a .irq_chip field to the samsung_pin_bank struct
>>       - Consolidated the wakeup and gpio irqd_ops
>>
>> Changes since v1:
>>       - Marked the newly created irq_chip instances as __initdata
>>       - Used kmemdup to keep a copy of the irq_chip
>>       - Change the pinctrl name from sd0_rdqs to sd0_ds as per UM
>>       - Moved the pinctrl enablement for exynos7 into a separate patch
>>       - Added tested-by and reviewed-by tags from Thomas Abraham
>>
>> This series has been tested on linux-next (20141008)
>> https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/ with
>> the following dependencies and [1].
>>
>> a) Samsung Serial symbol clean-up for exynos7 serial driver enablement (v2)
>>    http://www.spinics.net/lists/arm-kernel/msg366947.html
>>    http://www.spinics.net/lists/arm-kernel/msg366948.html
>> b) "dts, kbuild: Implement support for dtb vendor subdirs" patchset - rebased
>>    http://comments.gmane.org/gmane.linux.kbuild.devel/12131
>> c) "arch: arm64: enable support for Samsung Exynos7 SoC" patchset (v5) - rebased
>>    http://www.spinics.net/lists/arm-kernel/msg364014.html
>>
>> [1] https://lkml.org/lkml/2014/10/2/476
>>
>> Abhilash Kesavan (3):
>>   pinctrl: exynos: Generalize the eint16_31 demux code
>>   pinctrl: exynos: Consolidate irq domain callbacks
>>   pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
>>
>> Naveen Krishna Ch (3):
>>   pinctrl: exynos: Add initial driver data for Exynos7
>>   arm64: dts: Add initial pinctrl support to EXYNOS7
>>   arm64: exynos: Enable pinctrl support for Exynos7
>>
>>  .../bindings/pinctrl/samsung-pinctrl.txt           |    3 +
>>  arch/arm64/Kconfig                                 |    2 +
>>  arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi    |  560 ++++++++++++++++++++
>>  arch/arm64/boot/dts/exynos/exynos7.dtsi            |   66 +++
>>  drivers/pinctrl/samsung/pinctrl-exynos.c           |  188 +++++--
>>  drivers/pinctrl/samsung/pinctrl-exynos.h           |    3 +
>>  drivers/pinctrl/samsung/pinctrl-samsung.c          |    2 +
>>  drivers/pinctrl/samsung/pinctrl-samsung.h          |    3 +
>>  8 files changed, 791 insertions(+), 36 deletions(-)
>>  create mode 100644 arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
>>
>
> No further comments from me. Thanks Abhilash for addressing all of them.
>
> Linus, feel free to apply this series with my ACK (which seems to be
> already present in all patches).

Can you please pick this series up.

Thanks,
Abhilash
>
> Best regards,
> Tomasz
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread
* Re: [PATCH v5 0/6] Add initial support for pinctrl on Exynos7
  2014-10-20 14:01   ` Abhilash Kesavan
@ 2014-10-24 12:01     ` Linus Walleij
  2014-10-24 12:18       ` Tomasz Figa
  2014-10-24 14:33       ` Abhilash Kesavan
  0 siblings, 2 replies; 13+ messages in thread
From: Linus Walleij @ 2014-10-24 12:01 UTC (permalink / raw)
  To: Abhilash Kesavan
  Cc: linux-arm-kernel, Catalin Marinas, devicetree, linux-samsung-soc,
	robh@kernel.org, Naveen Krishna, Tomasz Figa

On Mon, Oct 20, 2014 at 4:01 PM, Abhilash Kesavan
<kesavan.abhilash@gmail.com> wrote:

> Can you please pick this series up.

Yes, sorry for the delay. I've applied patches
1,2,3,4. The patches to the DTS files should be taken
through whatever tree funnels arm64 dts files.

I hope Tomasz can rebase his nice
clean-up patches on top of this now.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 13+ messages in thread
* Re: [PATCH v5 0/6] Add initial support for pinctrl on Exynos7
  2014-10-24 12:01     ` Linus Walleij
@ 2014-10-24 12:18       ` Tomasz Figa
  2014-10-24 14:33       ` Abhilash Kesavan
  1 sibling, 0 replies; 13+ messages in thread
From: Tomasz Figa @ 2014-10-24 12:18 UTC (permalink / raw)
  To: Linus Walleij, Abhilash Kesavan
  Cc: linux-arm-kernel, Catalin Marinas, devicetree, linux-samsung-soc,
	robh@kernel.org, Naveen Krishna

Hi Linus,

On 24.10.2014 14:01, Linus Walleij wrote:
> On Mon, Oct 20, 2014 at 4:01 PM, Abhilash Kesavan
> <kesavan.abhilash@gmail.com> wrote:
> 
>> Can you please pick this series up.
> 
> Yes, sorry for the delay. I've applied patches
> 1,2,3,4. The patches to the DTS files should be taken
> through whatever tree funnels arm64 dts files.
> 
> I hope Tomasz can rebase his nice
> clean-up patches on top of this now.

Unfortunately I have quite a busy week right now, preparing for
relocation, so I will not be able to take care of this probably until
next weekend when I settle in my destination place. Sorry for the delay.

Best regards,
Tomasz

^ permalink raw reply	[flat|nested] 13+ messages in thread
* Re: [PATCH v5 0/6] Add initial support for pinctrl on Exynos7
  2014-10-24 12:01     ` Linus Walleij
  2014-10-24 12:18       ` Tomasz Figa
@ 2014-10-24 14:33       ` Abhilash Kesavan
       [not found]         ` <CAM4voamzXmEsk28O04Pozw4ZeWJ=H25G3TSK_KBmrff4NuCLiA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  1 sibling, 1 reply; 13+ messages in thread
From: Abhilash Kesavan @ 2014-10-24 14:33 UTC (permalink / raw)
  To: Linus Walleij
  Cc: linux-arm-kernel, Catalin Marinas, devicetree, linux-samsung-soc,
	robh@kernel.org, Naveen Krishna, Tomasz Figa

Hi Linus,

On Fri, Oct 24, 2014 at 5:31 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Mon, Oct 20, 2014 at 4:01 PM, Abhilash Kesavan
> <kesavan.abhilash@gmail.com> wrote:
>
>> Can you please pick this series up.
>
> Yes, sorry for the delay. I've applied patches
> 1,2,3,4. The patches to the DTS files should be taken
> through whatever tree funnels arm64 dts files.

Thank you for applying my patches. However, this version (v5) was
based on Tomasz's clean-up series and makes use of structures such as
"samsung_pin_bank_data" introduced by his series. It also marks the
samsung_pin_ctrl instance as __initconst. Thus, patch 4 would cause
compilation issues if Tomasz's clean-up patches have not been applied
before it.

My v4 version was independent of Tomasz's patch series and could be
applied directly.

Regards,
Abhilash
>
> I hope Tomasz can rebase his nice
> clean-up patches on top of this now.
>
> Yours,
> Linus Walleij

^ permalink raw reply	[flat|nested] 13+ messages in thread
* Re: [PATCH v5 0/6] Add initial support for pinctrl on Exynos7
       [not found]         ` <CAM4voamzXmEsk28O04Pozw4ZeWJ=H25G3TSK_KBmrff4NuCLiA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2014-10-28 17:30           ` Linus Walleij
  0 siblings, 0 replies; 13+ messages in thread
From: Linus Walleij @ 2014-10-28 17:30 UTC (permalink / raw)
  To: Abhilash Kesavan
  Cc: linux-arm-kernel, Catalin Marinas, devicetree, linux-samsung-soc,
	robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Naveen Krishna,
	Tomasz Figa

On Fri, Oct 24, 2014 at 4:33 PM, Abhilash Kesavan
<kesavan.abhilash-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On Fri, Oct 24, 2014 at 5:31 PM, Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>> On Mon, Oct 20, 2014 at 4:01 PM, Abhilash Kesavan
>> <kesavan.abhilash-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>
>>> Can you please pick this series up.
>>
>> Yes, sorry for the delay. I've applied patches
>> 1,2,3,4. The patches to the DTS files should be taken
>> through whatever tree funnels arm64 dts files.
>
> Thank you for applying my patches. However, this version (v5) was
> based on Tomasz's clean-up series (...)

And Tomasz series had other problems.

So now I took everything out and asked Tomasz to get
a pull request for the stuff instead.

Yours,
Linus Walleij
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^ permalink raw reply	[flat|nested] 13+ messages in thread
end of thread, other threads:[~2014-10-28 17:30 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-10-09 13:54 [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Abhilash Kesavan
2014-10-09 13:54 ` [PATCH v5 1/6] pinctrl: exynos: Generalize the eint16_31 demux code Abhilash Kesavan
2014-10-09 13:54 ` [PATCH v5 2/6] pinctrl: exynos: Consolidate irq domain callbacks Abhilash Kesavan
2014-10-09 13:54 ` [PATCH v5 3/6] pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts Abhilash Kesavan
2014-10-09 13:54 ` [PATCH v5 4/6] pinctrl: exynos: Add initial driver data for Exynos7 Abhilash Kesavan
2014-10-09 13:54 ` [PATCH v5 5/6] arm64: dts: Add initial pinctrl support to EXYNOS7 Abhilash Kesavan
2014-10-09 13:54 ` [PATCH v5 6/6] arm64: exynos: Enable pinctrl support for Exynos7 Abhilash Kesavan
2014-10-11 18:57 ` [PATCH v5 0/6] Add initial support for pinctrl on Exynos7 Tomasz Figa
2014-10-20 14:01   ` Abhilash Kesavan
2014-10-24 12:01     ` Linus Walleij
2014-10-24 12:18       ` Tomasz Figa
2014-10-24 14:33       ` Abhilash Kesavan
     [not found]         ` <CAM4voamzXmEsk28O04Pozw4ZeWJ=H25G3TSK_KBmrff4NuCLiA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-10-28 17:30           ` Linus Walleij

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