From mboxrd@z Thu Jan 1 00:00:00 1970 From: Florian Fainelli Subject: Re: [PATCH 05/11] irqchip: bcm7120-l2: Make sure all register accesses use base+offset Date: Wed, 29 Oct 2014 09:53:56 -0700 Message-ID: <54511BA4.4000509@gmail.com> References: <1414555138-6500-1-git-send-email-cernekee@gmail.com> <1414555138-6500-5-git-send-email-cernekee@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1414555138-6500-5-git-send-email-cernekee@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: Kevin Cernekee , tglx@linutronix.de, jason@lakedaemon.net, ralf@linux-mips.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, mbizon@freebox.fr, jogo@openwrt.org, linux-mips@linux-mips.org List-Id: devicetree@vger.kernel.org On 10/28/2014 08:58 PM, Kevin Cernekee wrote: > A couple of accesses to IRQEN (base+0x00) just used "base" directly, so > they would break if IRQEN ever became nonzero. Make sure that all > reads/writes specify the register offset constant. > > Signed-off-by: Kevin Cernekee Acked-by: Florian Fainelli > --- > drivers/irqchip/irq-bcm7120-l2.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c > index 49d8f3d..6472b71 100644 > --- a/drivers/irqchip/irq-bcm7120-l2.c > +++ b/drivers/irqchip/irq-bcm7120-l2.c > @@ -66,10 +66,10 @@ static void bcm7120_l2_intc_suspend(struct irq_data *d) > > irq_gc_lock(gc); > /* Save the current mask and the interrupt forward mask */ > - b->saved_mask = __raw_readl(b->base) | b->irq_fwd_mask; > + b->saved_mask = __raw_readl(b->base + IRQEN) | b->irq_fwd_mask; > if (b->can_wake) { > reg = b->saved_mask | gc->wake_active; > - __raw_writel(reg, b->base); > + __raw_writel(reg, b->base + IRQEN); > } > irq_gc_unlock(gc); > } > @@ -81,7 +81,7 @@ static void bcm7120_l2_intc_resume(struct irq_data *d) > > /* Restore the saved mask */ > irq_gc_lock(gc); > - __raw_writel(b->saved_mask, b->base); > + __raw_writel(b->saved_mask, b->base + IRQEN); > irq_gc_unlock(gc); > } > >