From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Coquelin Subject: Re: [PATCH v5 4/8] ARM: DT: STi: STiH407: Add DT node for MiPHY28lp Date: Tue, 18 Nov 2014 12:51:31 +0100 Message-ID: <546B32C3.8000602@st.com> References: <1415098284-11182-1-git-send-email-gabriel.fernandez@linaro.org> <1415098284-11182-5-git-send-email-gabriel.fernandez@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1415098284-11182-5-git-send-email-gabriel.fernandez-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Gabriel FERNANDEZ , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Srinivas Kandagatla , Patrice Chotard , Russell King , Kishon Vijay Abraham I , Grant Likely Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org, Lee Jones , Gabriel Fernandez List-Id: devicetree@vger.kernel.org Hi Gabriel, On 11/04/2014 11:51 AM, Gabriel FERNANDEZ wrote: > The MiPHY28lp is a Generic PHY which can serve various SATA, PCIe or > USB3 devices. The two first ports can be use for either; both SATA, both > PCIe or one of each in any configuration. > The Third port is only for USB3. > > Signed-off-by: Gabriel Fernandez > --- > arch/arm/boot/dts/stih407-b2120.dts | 11 +++++++ > arch/arm/boot/dts/stih407.dtsi | 65 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 76 insertions(+) Finally, I won't apply this patch in its current form. Indeed, you should follow Arnd recommendations on Syscfg registers handling in DT. See https://lkml.org/lkml/2014/11/13/161 Regards, Maxime -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html