From: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
To: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Emilio Lopez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Mike Turquette
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Samuel Ortiz <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
Linux Media Mailing List
<linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH v2 3/9] clk: sunxi: Add prcm mod0 clock driver
Date: Wed, 26 Nov 2014 09:04:57 +0100 [thread overview]
Message-ID: <547589A9.5060802@redhat.com> (raw)
In-Reply-To: <20141125165744.GA17789@x1>
Hi,
On 11/25/2014 05:57 PM, Lee Jones wrote:
> On Sun, 23 Nov 2014, Hans de Goede wrote:
>
>> Add a driver for mod0 clocks found in the prcm. Currently there is only
>> one mod0 clocks in the prcm, the ir clock.
>>
>> Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
>> ---
>> Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
>> drivers/clk/sunxi/Makefile | 2 +-
>> drivers/clk/sunxi/clk-sun6i-prcm-mod0.c | 63 +++++++++++++++++++++++
>> drivers/mfd/sun6i-prcm.c | 14 +++++
>> 4 files changed, 79 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
>
> [...]
>
>> diff --git a/drivers/mfd/sun6i-prcm.c b/drivers/mfd/sun6i-prcm.c
>> index 283ab8d..ff1254f 100644
>> --- a/drivers/mfd/sun6i-prcm.c
>> +++ b/drivers/mfd/sun6i-prcm.c
>> @@ -41,6 +41,14 @@ static const struct resource sun6i_a31_apb0_gates_clk_res[] = {
>> },
>> };
>>
>> +static const struct resource sun6i_a31_ir_clk_res[] = {
>> + {
>> + .start = 0x54,
>> + .end = 0x57,
>> + .flags = IORESOURCE_MEM,
>> + },
>> +};
>
> I'm not overly keen on these magic numbers (and yes, I'm well aware
> that I SoB'ed the patch which started them off).
>
> It's not a show stopper, although I'd prefer if they were fixed with a
> subsequent patch.
These are offsets of the relevant registers inside the prcm register block,
if not done this way, then how should they be done ?
Regards,
Hans
next prev parent reply other threads:[~2014-11-26 8:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-23 13:38 [PATCH v2 0/9] sun6i / A31 ir receiver support Hans de Goede
[not found] ` <1416749895-25013-1-git-send-email-hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2014-11-23 13:38 ` [PATCH v2 1/9] clk: sunxi: Give sunxi_factors_register a registers parameter Hans de Goede
[not found] ` <1416749895-25013-2-git-send-email-hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2014-11-26 20:40 ` Maxime Ripard
2014-11-23 13:38 ` [PATCH v2 2/9] clk: sunxi: Make sun4i_a10_mod0_data available outside of clk-mod0.c Hans de Goede
2014-11-23 13:38 ` [PATCH v2 3/9] clk: sunxi: Add prcm mod0 clock driver Hans de Goede
[not found] ` <1416749895-25013-4-git-send-email-hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2014-11-25 16:57 ` Lee Jones
2014-11-26 8:04 ` Hans de Goede [this message]
[not found] ` <547589A9.5060802-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2014-11-27 8:36 ` Lee Jones
2014-11-23 13:38 ` [PATCH v2 4/9] rc: sunxi-cir: Add support for an optional reset controller Hans de Goede
2014-11-23 13:38 ` [PATCH v2 5/9] rc: sunxi-cir: Add support for the larger fifo found on sun5i and sun6i Hans de Goede
2014-11-23 13:38 ` [PATCH v2 6/9] ARM: dts: sun6i: Add ir_clk node Hans de Goede
2014-11-23 13:38 ` [PATCH v2 7/9] ARM: dts: sun6i: Add ir node Hans de Goede
2014-11-23 13:38 ` [PATCH v2 8/9] ARM: dts: sun6i: Add pinmux settings for the ir pins Hans de Goede
[not found] ` <1416749895-25013-9-git-send-email-hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2014-11-27 9:14 ` Maxime Ripard
2014-11-23 13:38 ` [PATCH v2 9/9] ARM: dts: sun6i: Enable ir receiver on the Mele M9 Hans de Goede
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