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From: Thor Thayer <tthayer@opensource.altera.com>
To: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com,
	robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
	ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
	linux@arm.linux.org.uk, dinguyen@opensource.altera.com,
	grant.likely@linaro.org
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com
Subject: Re: [RESEND PATCHv5 5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC
Date: Mon, 1 Dec 2014 14:47:41 -0600	[thread overview]
Message-ID: <547CD3ED.1080804@opensource.altera.com> (raw)
In-Reply-To: <546BB27A.20405@opensource.altera.com>

Hi Boris,

On 11/18/2014 02:56 PM, Thor Thayer wrote:
> Hi all,
>
> On 11/11/2014 06:14 PM, tthayer@opensource.altera.com wrote:
>> From: Thor Thayer<tthayer@opensource.altera.com>
>>
>> Adding the device tree entries and bindings needed to support
>> the Altera L2 cache and On-Chip RAM EDAC. This patch relies upon
>> an earlier patch to declare and setup On-chip RAM properly.
>> http://www.spinics.net/lists/devicetree/msg51117.html
>
> Any comments on these devicetree additions?
>
> Thanks,
> Thor
>> Signed-off-by: Thor Thayer<tthayer@opensource.altera.com>
>> ---
>> v2: Remove OCRAM declaration and reference prior patch.
>>
>> v3-5: No Change
>> ---

I originally submitted this series on November 11, 2014.

I haven't received any comments or ACKs on the device tree patch portion 
(patch 5 of 5). According to 
Documentation/devicetree/bindings/submitting-patches.txt, if the patch 
hasn't been Acked after a couple of weeks, the maintainer can pull the 
changes if they are comfortable with those changes.

Dinh checked for merge conflicts in the DTS files in his November 7 
email (queued patches for 3.19).

Dinh acked patches 1 & 2 on November 12.

Thanks,

Thor


  reply	other threads:[~2014-12-01 20:47 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-12  0:14 [PATCHv5 0/5] Add Altera peripheral memories to EDAC framework tthayer
2014-11-12  0:14 ` [PATCHv5 1/5] arm: socfpga: Enable L2 Cache ECC on startup tthayer
2014-11-12  7:32   ` Dinh Nguyen
2014-11-12  0:14 ` [PATCHv5 2/5] arm: socfpga: Enable OCRAM " tthayer
2014-11-12  7:33   ` Dinh Nguyen
     [not found]   ` <1415751263-1830-3-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2014-12-02 15:11     ` Mark Rutland
2014-12-02 17:54       ` Thor Thayer
2014-11-12  0:14 ` [PATCHv5 3/5] edac: altera: Remove SDRAM module compile tthayer
2014-11-12  0:14 ` [PATCHv5 4/5] edac: altera: Add Altera L2 Cache and OCRAM EDAC Support tthayer
2014-12-02 15:25   ` Mark Rutland
2014-12-02 17:55     ` Thor Thayer
2014-11-12  0:14 ` [PATCHv5 5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC tthayer
2014-11-18 20:56   ` [RESEND PATCHv5 " Thor Thayer
2014-12-01 20:47     ` Thor Thayer [this message]
2014-12-02 15:01       ` Mark Rutland
2014-12-02 17:51         ` Thor Thayer
2014-12-02 14:57   ` [PATCHv5 " Mark Rutland
2014-12-02 17:55     ` Thor Thayer

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