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From: Vignesh Raghavendra <vigneshr@ti.com>
To: Roger Quadros <rogerq@kernel.org>, <nm@ti.com>
Cc: <afd@ti.com>, <a-bhatia1@ti.com>, <kristo@kernel.org>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<conor+dt@kernel.org>, <srk@ti.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	"Kishon Vijay Abraham I" <kishon@ti.com>
Subject: Re: [PATCH 3/3] arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality card
Date: Mon, 5 Feb 2024 20:16:45 +0530	[thread overview]
Message-ID: <547d7069-3457-4ee3-ad1c-fedc9db5da62@ti.com> (raw)
In-Reply-To: <20240126114530.40913-4-rogerq@kernel.org>



On 26/01/24 17:15, Roger Quadros wrote:
> From: Kishon Vijay Abraham I <kishon@ti.com>
> 

[...]

>  # Boards with J7200 SoC
>  k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo
> diff --git a/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso b/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso
> new file mode 100644
> index 000000000000..c63b7241c005
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/**
> + * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM
> + *
> + * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/phy/phy.h>
> +#include <dt-bindings/phy/phy-am654-serdes.h>
> +
> +#include "k3-pinctrl.h"
> +
> +&serdes1 {
> +	status = "okay";
> +};
> +
> +&pcie1_rc {
> +	num-lanes = <1>;
> +	phys = <&serdes1 PHY_TYPE_PCIE 0>;
> +	phy-names = "pcie-phy0";
> +	reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
> +	status = "okay";
> +};
> +
> +&pcie1_ep {
> +	num-lanes = <1>;
> +	phys = <&serdes1 PHY_TYPE_PCIE 0>;
> +	phy-names = "pcie-phy0";
> +};
> +
> +&main_pmx0 {
> +	usb0_pins_default: usb0_pins_default {

No underscores in node-name and also should end with -pins

> +		pinctrl-single,pins = <
> +			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
> +		>;
> +	};
> +};
> +
> +&serdes0 {
> +	status = "okay";
> +	assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
> +	assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
> +};
> +
> +&dwc3_0 {
> +	status = "okay";
> +	assigned-clock-parents = <&k3_clks 151 4>,      /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
> +	<&k3_clks 151 8>;      /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
> +	phys = <&serdes0 PHY_TYPE_USB3 0>;
> +	phy-names = "usb3-phy";
> +};
> +
> +&usb0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&usb0_pins_default>;
> +	dr_mode = "host";
> +	maximum-speed = "super-speed";
> +	snps,dis-u1-entry-quirk;
> +	snps,dis-u2-entry-quirk;
> +};
> +
> +&usb0_phy {
> +	status = "okay";
> +};


BTW, this breaks build on 6.8-rc1


  DTOVL   arch/arm64/boot/dts/ti/k3-am654-gp-evm.dtb

Failed to apply 'arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtbo': FDT_ERR_NOTFOUND


-- 
Regards
Vignesh

  reply	other threads:[~2024-02-05 14:46 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-26 11:45 [PATCH 0/3] arm64: dts: ti: am65x: Add PCIe + USB DT overlay files Roger Quadros
2024-01-26 11:45 ` [PATCH 1/3] arm64: dts: ti: am65x: Fix dtbs_install for Rocktech OLDI overlay Roger Quadros
2024-01-26 11:45 ` [PATCH 2/3] arm64: dts: ti: Add DT overlay for PCIe + USB2.0 SERDES personality card Roger Quadros
2024-01-26 11:45 ` [PATCH 3/3] arm64: dts: ti: Add DT overlay for PCIe + USB3.0 " Roger Quadros
2024-02-05 14:46   ` Vignesh Raghavendra [this message]
2024-02-06 13:36     ` Roger Quadros
2024-02-08  4:24       ` Vignesh Raghavendra

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