From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Biju Das <biju.das.jz@bp.renesas.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
devicetree@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>,
Chris Paterson <chris.paterson2@renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v5 1/5] dt-bindings: timer: Document RZ/G2L MTU3a bindings
Date: Thu, 27 Oct 2022 18:12:51 -0400 [thread overview]
Message-ID: <548fda02-21da-718b-7ac4-f610db6ec15e@linaro.org> (raw)
In-Reply-To: <20221027144844.85149-2-biju.das.jz@bp.renesas.com>
On 27/10/2022 10:48, Biju Das wrote:
> The RZ/G2L multi-function timer pulse unit 3 (MTU3a) is embedded in
> the Renesas RZ/G2L family SoC's. It consists of eight 16-bit timer
> channels and one 32-bit timer channel. It supports the following
> functions
> - Counter
> - Timer
> - PWM
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v4->v5:
> * Modelled as timer bindings.
> * Fixed the typo.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-10-27 22:13 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-27 14:48 [PATCH v5 0/5] Add RZ/G2L MTU3 Core, Counter and pwm driver Biju Das
2022-10-27 14:48 ` [PATCH v5 1/5] dt-bindings: timer: Document RZ/G2L MTU3a bindings Biju Das
2022-10-27 22:12 ` Krzysztof Kozlowski [this message]
2022-10-30 13:30 ` Rob Herring
2022-11-07 6:55 ` [PATCH v5 0/5] Add RZ/G2L MTU3 Core, Counter and pwm driver Biju Das
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