Re: [PATCH v8 0/2] mtd: hisilicon: add a new driver for NAND controller of hisilicon hip04 Soc

[Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>]

On 2015/2/8 16:35, Brian Norris wrote:
> On Sun, Jan 25, 2015 at 06:53:12PM +0800, Zhou Wang wrote:
>> This patchset adds the support for NAND controller of hisilicon hip04 Soc.
>> The NAND controller IP was developed by hisilicon and needs a new driver to
>> support it. This patchset is based on l2-mtd/master.
>>
>> I have tested this NAND flash controller driver in Hip04 D01 board using MTD
>> test modules. All testes passed except mtd_nandbiterrs. The reason is that this
>> NAND controller doesn't support to write raw page in ECC mode. In the test of
>> mtd_nandbiterrs, when rewriting raw page(with some bits changed) back, this NAND
>> controller will also produce ECC codes and write into NAND flash OOB area. As
>> ECC codes in OOB area have been broken, read error comes out as follow.
>>
>> Hi Brian,
>>
>> As the patch have been reviewed for some time, could you consider to take this
>> driver for v3.20? If there is something still not good, please let me know.
> 
> It's all looking good. Pushed to l2-mtd.git, probably for 3.20. I have
> one or two small comments that may be worth thinking about though.
> 
> Brian
> 
> .
>
Hi Brian,

Thanks a lot.

Zhou Wang

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html