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([2601:586:5000:570:28d9:4790:bc16:cc93]) by smtp.gmail.com with ESMTPSA id j6-20020a05620a288600b006fa00941e9dsm8867292qkp.136.2022.11.02.12.35.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Nov 2022 12:35:40 -0700 (PDT) Message-ID: <5520fc8b-e59f-d17b-33c8-5a6e869c6408@linaro.org> Date: Wed, 2 Nov 2022 15:35:39 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.1 Subject: Re: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx Versal EDAC for DDRMC Content-Language: en-US To: Shubhrajyoti Datta , linux-edac@vger.kernel.org Cc: git@amd.com, devicetree@vger.kernel.org, michal.simek@xilinx.com, rric@kernel.org, james.morse@arm.com, tony.luck@intel.com, mchehab@kernel.org, bp@alien8.de, robh+dt@kernel.org References: <20221102084608.28894-1-shubhrajyoti.datta@amd.com> <20221102084608.28894-2-shubhrajyoti.datta@amd.com> From: Krzysztof Kozlowski In-Reply-To: <20221102084608.28894-2-shubhrajyoti.datta@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 02/11/2022 04:46, Shubhrajyoti Datta wrote: > This patch adds device tree bindings for Xilinx Versal EDAC for DDR Do not use "This commit/patch". https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95 > controller. > > Co-developed-by: Sai Krishna Potthuri > Signed-off-by: Sai Krishna Potthuri > Signed-off-by: Shubhrajyoti Datta > --- > > .../xlnx,versal-ddrmc-edac.yaml | 57 +++++++++++++++++++ > 1 file changed, 57 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/xlnx,versal-ddrmc-edac.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/xlnx,versal-ddrmc-edac.yaml b/Documentation/devicetree/bindings/memory-controllers/xlnx,versal-ddrmc-edac.yaml > new file mode 100644 > index 000000000000..6717bc0f3be9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/xlnx,versal-ddrmc-edac.yaml > @@ -0,0 +1,57 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/xlnx,versal-ddrmc-edac.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Xilinx Versal DDRMC (Integrated DDR Memory Controller) > + > +maintainers: > + - Shubhrajyoti Datta > + - Sai Krishna Potthuri > + > +description: > + The integrated DDR Memory Controllers (DDRMCs) support both DDR4 and LPDDR4/ > + 4X memory interfaces. Versal DDR memory controller has an optional ECC support > + which correct single bit ECC errors and detect double bit ECC errors. > + > +properties: > + compatible: > + const: xlnx,versal-ddrmc-edac Drop "edac". That's a Linuxism. > + > + reg: > + items: > + - description: DDR Memory Controller registers > + - description: NOC registers corresponding to DDR Memory Controller > + > + reg-names: > + items: > + - const: ddrmc_base > + - const: ddrmc_noc_base Drop redundant parts from names, so these could be "base" and "noc" or "ddrmc" and "noc". Or anything a bit more reasonable... Best regards, Krzysztof