From: Sylwester Nawrocki <s.nawrocki@samsung.com>
To: Chanwoo Choi <cw00.choi@samsung.com>
Cc: tomasz.figa@gmail.com, mturquette@linaro.org, kgene@kernel.org,
inki.dae@samsung.com, chanho61.park@samsung.com,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org,
Jonghwa Lee <jonghwa3.lee@samsung.com>
Subject: Re: [PATCH v3 10/10] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to prevent the hang for suspend-to-ram
Date: Tue, 28 Apr 2015 11:15:30 +0200 [thread overview]
Message-ID: <553F4FB2.9030201@samsung.com> (raw)
In-Reply-To: <1430134597-14668-11-git-send-email-cw00.choi@samsung.com>
Hi Chanwoo,
On 27/04/15 13:36, Chanwoo Choi wrote:
> From: Jonghwa Lee <jonghwa3.lee@samsung.com>
>
> Some clocks are required being unmasked for suspend-to-ram. Otherwise,
> PMU (Power Management Unit) will stick and power line never down.
>
> Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
> @@ -1718,11 +1722,14 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = {
> GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
> 3, CLK_SET_RATE_PARENT, 0),
> GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric",
> - ENABLE_SCLK_PERIC, 2, CLK_SET_RATE_PARENT, 0),
> + ENABLE_SCLK_PERIC, 2,
> + CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
> GATE(CLK_SCLK_UART1, "sclk_uart1", "sclk_uart1_peric",
> - ENABLE_SCLK_PERIC, 1, CLK_SET_RATE_PARENT, 0),
> + ENABLE_SCLK_PERIC, 1,
> + CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
> GATE(CLK_SCLK_UART0, "sclk_uart0", "sclk_uart0_peric",
> - ENABLE_SCLK_PERIC, 0, CLK_SET_RATE_PARENT, 0),
> + ENABLE_SCLK_PERIC, 0,
> + CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
> };
>
> static struct samsung_cmu_info peric_cmu_info __initdata = {
> @@ -3025,7 +3032,7 @@ static struct samsung_gate_clock aud_gate_clks[] __initdata = {
>
> /* ENABLE_SCLK_AUD0 */
> GATE(CLK_ATCLK_AUD, "atclk_aud", "div_atclk_aud", ENABLE_SCLK_AUD0,
> - 2, 0, 0),
> + 2, CLK_IGNORE_UNUSED, 0),
> GATE(CLK_PCLK_DBG_AUD, "pclk_dbg_aud", "div_pclk_dbg_aud",
> ENABLE_SCLK_AUD0, 1, 0, 0),
> GATE(CLK_SCLK_AUD_CA5, "sclk_aud_ca5", "div_aud_ca5", ENABLE_SCLK_AUD0,
> @@ -3425,9 +3432,11 @@ static struct samsung_gate_clock gscl_gate_clks[] __initdata = {
> GATE(CLK_ACLK_GSCLNP_111, "aclk_gsclnp_111", "mout_aclk_gscl_111_user",
> ENABLE_ACLK_GSCL, 6, CLK_IGNORE_UNUSED, 0),
> GATE(CLK_ACLK_GSCLRTND_333, "aclk_gsclrtnd_333",
> - "mout_aclk_gscl_333_user", ENABLE_ACLK_GSCL, 5, 0, 0),
> + "mout_aclk_gscl_333_user", ENABLE_ACLK_GSCL, 5,
> + CLK_IGNORE_UNUSED, 0),
> GATE(CLK_ACLK_GSCLBEND_333, "aclk_gsclbend_333",
> - "mout_aclk_gscl_333_user", ENABLE_ACLK_GSCL, 4, 0, 0),
> + "mout_aclk_gscl_333_user", ENABLE_ACLK_GSCL, 4,
> + CLK_IGNORE_UNUSED, 0),
Some of the clocks you are adding CLK_IGNORE_UNUSED flag for here are
or will be handled be the related IP drivers, thus can be gated regardless
of the changes done in this patch. I would suggest to register suspend/
resume syscore ops like exynos5420_clk_syscore_ops and enable some of
clocks you're touching in this patch explicitly in the suspend() callback
and restore the registers state from before suspend() call in resume().
I've picked up patches 01/10...09/10.
In future please also copy linux-clk@vger.kernel.org on clk related patches.
--
Regards,
Sylwester
next prev parent reply other threads:[~2015-04-28 9:15 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-27 11:36 [PATCH v3 00/10] clk: samsung: exynos5433: Fix bug and support dvfs/suspend-to-ram Chanwoo Choi
2015-04-27 11:36 ` [PATCH v3 01/10] clk: samsung: Use CONFIG_ARCH_EXYNOS instead of CONFIG_ARCH_EXYNOS5433 Chanwoo Choi
2015-04-27 11:36 ` [PATCH v3 02/10] clk: samsung: exynos5433: Fix wrong offset of PCLK_MSCL_SECURE_SMMU_JPEG Chanwoo Choi
2015-04-27 12:37 ` Krzysztof Kozłowski
2015-04-27 11:36 ` [PATCH v3 03/10] clk: samsung: exynos5433: Fix CLK_PCLK_MONOTONIC_CNT's register correctly Chanwoo Choi
[not found] ` <1430134597-14668-4-git-send-email-cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2015-04-27 12:40 ` Krzysztof Kozłowski
2015-04-27 11:36 ` [PATCH v3 04/10] clk: samsung: exynos5433: Fix wrong parent clock of sclk_apollo clock Chanwoo Choi
2015-04-27 12:43 ` Krzysztof Kozłowski
2015-04-27 11:36 ` [PATCH v3 05/10] clk: samsung: exynos5433: Fix wrong PMS value of exynos5433_pll_rates Chanwoo Choi
2015-04-27 11:36 ` [PATCH v3 06/10] clk: samsung: exynos5433: Add CLK_SET_RATE_PARENT to support DVFS for big.LITTLE core Chanwoo Choi
2015-04-27 11:36 ` [PATCH v3 07/10] clk: samsung: exynos5433: Add DIV_CPIF to store it when the board is being suspended Chanwoo Choi
2015-04-27 11:36 ` [PATCH v3 08/10] clk: samsung: exynos5433: Add clock flag to support the DVFS of GPU Chanwoo Choi
2015-04-27 11:36 ` [PATCH v3 09/10] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to clocks for sercure monitor call Chanwoo Choi
2015-04-27 13:11 ` Krzysztof Kozłowski
2015-04-27 11:36 ` [PATCH v3 10/10] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to prevent the hang for suspend-to-ram Chanwoo Choi
2015-04-27 13:49 ` Krzysztof Kozłowski
2015-04-28 9:15 ` Sylwester Nawrocki [this message]
2015-04-28 9:28 ` Chanwoo Choi
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