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	id 1tJ7Vv-0001iq-2o; Thu, 05 Dec 2024 09:47:11 +0100
From: Heiko =?ISO-8859-1?Q?St=FCbner?= <heiko@sntech.de>
To: Frank Wang <frawang.cn@gmail.com>, vkoul@kernel.org, kishon@kernel.org,
 robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
 Kever Yang <kever.yang@rock-chips.com>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
 linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
 linux-rockchip@lists.infradead.org, william.wu@rock-chips.com,
 tim.chen@rock-chips.com, Frank Wang <frank.wang@rock-chips.com>
Subject:
 Re: [RESEND PATCH v3 2/2] phy: rockchip-naneng-combo: add rk3576 support
Date: Thu, 05 Dec 2024 09:47:10 +0100
Message-ID: <5541205.29KlJPOoH8@diego>
In-Reply-To: <e853b62f-2ebd-4520-8dea-15d8102f25d8@rock-chips.com>
References:
 <20241106021357.19782-1-frawang.cn@gmail.com>
 <20241106021357.19782-2-frawang.cn@gmail.com>
 <e853b62f-2ebd-4520-8dea-15d8102f25d8@rock-chips.com>
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Hi Kever,

Am Donnerstag, 5. Dezember 2024, 09:21:07 CET schrieb Kever Yang:
> On 2024/11/6 10:13, Frank Wang wrote:
> > From: Kever Yang <kever.yang@rock-chips.com>
> >
> > Rockchip RK3576 integrates two naneng-combo PHY, PHY0 is used for
> > PCIE and SATA, PHY1 is used for PCIE, SATA and USB3.
> >
> > This adds device specific data support.
> >
> > Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> > Signed-off-by: William Wu <william.wu@rock-chips.com>
> > Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
> Test on rk3576 evb with pcie port.
> Test-by: Kever Yang <kever.yang@rock-chips.com>

nitpick: the tag should be named

Tested-by: Kever Yang <kever.yang@rock-chips.com>