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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown CC: , , , , References: <20240426125707.585269-1-christophe.roullier@foss.st.com> <20240426125707.585269-11-christophe.roullier@foss.st.com> <43024130-dcd6-4175-b958-4401edfb5fd8@denx.de> <8bf3be27-3222-422d-bfff-ff67271981d8@foss.st.com> <9c1d80eb-03e7-4d39-b516-cbcae0d50e4a@denx.de> Content-Language: en-US From: Alexandre TORGUE In-Reply-To: <9c1d80eb-03e7-4d39-b516-cbcae0d50e4a@denx.de> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_03,2024-05-15_01,2023-05-22_02 Hi On 5/16/24 02:23, Marek Vasut wrote: > On 5/13/24 6:01 PM, Alexandre TORGUE wrote: >> Hi Marek > > Hi, > >> On 4/26/24 17:44, Marek Vasut wrote: >>> On 4/26/24 2:57 PM, Christophe Roullier wrote: >>>> Add dual Ethernet: >>>> -Ethernet1: RMII with crystal >>>> -Ethernet2: RMII without crystal >>>> PHYs used are SMSC (LAN8742A) >>>> >>>> With Ethernet1, we can performed WoL from PHY instead of GMAC point >>>> of view. >>>> (in this case IRQ for WoL is managed as wakeup pin and configured >>>> in OS secure). >>> >>> How does the Linux PHY driver process such a PHY IRQ ? >>> >>> Or is Linux unaware of the PHY IRQ ? Doesn't that cause issues ? >> >> In this case, we want to have an example to wakeup the system from >> Standby low power mode (VDDCPU and VDD_CORE off) thanks to a magic >> packet detected by the PHY. The PHY then assert his interrupt output >> signal. >> On MP13 DK platform, this PHY signal is connected to a specific GPIO >> aka "Wakeup pins" (only 6 wakeup pins an MP13). Those specific GPIOs >> are handled by the PWR peripheral which is controlled by the secure OS. > > What does configure the PHY for this wakeup mode ? Linux device tree. > >> On WoL packet, the Secure OS catches the PHY interrupt and uses >> asynchronous notification mechanism to warn Linux (on our platform we >> use a PPI). On Linux side, Optee core driver creates an irq >> domain/irqchip triggered on the asynchronous notification. Each device >> which use a wakeup pin need then to request an IRQ on this "Optee irq >> domain". >> >> This OPTEE irq domain will be pushed soon. > > I suspect it might make sense to add this WoL part separately from the > actual ethernet DT nodes, so ethernet could land and the WoL > functionality can be added when it is ready ? If at the end we want to have this Wol from PHY then I agree we need to wait. We could push a WoL from MAC for this node before optee driver patches merge but not sure it makes sens. Alex