[PATCHv2] ARM: socfpga: dts: Add a clock node for sdmmc CIU

[PATCHv2] ARM: socfpga: dts: Add a clock node for sdmmc CIU

[dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx]

From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
node and makes the sdmmc_clk it's parent.

Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
v2: renamed ciu_clk to sdmmc_clk_divided
---
 arch/arm/boot/dts/socfpga.dtsi | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index d9176e6..be4beda 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -451,6 +451,14 @@
 						clk-phase = <0 135>;
 					};
 
+					sdmmc_clk_divided: sdmmc_clk_divided {
+						#clock-cells = <0>;
+						compatible = "altr,socfpga-gate-clk";
+						clocks = <&sdmmc_clk>;
+						clk-gate = <0xa0 8>;
+						fixed-divider = <4>;
+					};
+
 					nand_x_clk: nand_x_clk {
 						#clock-cells = <0>;
 						compatible = "altr,socfpga-gate-clk";
@@ -635,7 +643,7 @@
 			fifo-depth = <0x400>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			clocks = <&l4_mp_clk>, <&sdmmc_clk>;
+			clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
 			clock-names = "biu", "ciu";
 		};
 
-- 
2.2.1

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Re: [PATCHv2] ARM: socfpga: dts: Add a clock node for sdmmc CIU

[Stephen Boyd]

On 04/14, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> 
> The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
> which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
> passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
> node and makes the sdmmc_clk it's parent.
> 
> Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> ---

Is this a fix of some sort? I'm confused why this was sent to the
clk maintainers when it seems to be more appropriate to go
through the arm-soc tree.

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Re: [PATCHv2] ARM: socfpga: dts: Add a clock node for sdmmc CIU

[Dinh Nguyen]

On 5/13/15 2:54 AM, Stephen Boyd wrote:
> On 04/14, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
>> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>>
>> The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
>> which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
>> passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
>> node and makes the sdmmc_clk it's parent.
>>
>> Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>> ---
> 
> Is this a fix of some sort? I'm confused why this was sent to the
> clk maintainers when it seems to be more appropriate to go
> through the arm-soc tree.
> 

Ok, sorry about that. I thought since it was clock nodes, it would
appropriate to CC clk maintainers.

BTW, can I take patches from drivers/clk/socfpga/* through the arm-soc
tree or would that go through you guys?

Thanks,
Dinh
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Re: [PATCHv2] ARM: socfpga: dts: Add a clock node for sdmmc CIU

[Stephen Boyd]

On 05/13, Dinh Nguyen wrote:
> 
> 
> On 5/13/15 2:54 AM, Stephen Boyd wrote:
> > On 04/14, dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
> >> From: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> >>
> >> The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
> >> which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
> >> passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
> >> node and makes the sdmmc_clk it's parent.
> >>
> >> Signed-off-by: Dinh Nguyen <dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> >> ---
> > 
> > Is this a fix of some sort? I'm confused why this was sent to the
> > clk maintainers when it seems to be more appropriate to go
> > through the arm-soc tree.
> > 
> 
> Ok, sorry about that. I thought since it was clock nodes, it would
> appropriate to CC clk maintainers.

Sure, Cc is fine, but I believe the mail was sent "To" us so that
led to my confusion.

> 
> BTW, can I take patches from drivers/clk/socfpga/* through the arm-soc
> tree or would that go through you guys?
> 

Unless there's some sort of complicated dependency between the
clk tree and the arm-soc tree I'd prefer any patches against
drivers/clk/* go through the clk tree.

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