From: Thor Thayer <tthayer@opensource.altera.com>
To: Arnd Bergmann <arnd@arndb.de>, linux-arm-kernel@lists.infradead.org
Cc: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, dinguyen@opensource.altera.com,
grant.likely@linaro.org, devicetree@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
tthayer.linux@gmail.com, linux-edac@vger.kernel.org
Subject: Re: [PATCH 4/4] dts, altera: Arria10 SDRAM EDAC DTS additions.
Date: Fri, 15 May 2015 16:01:39 -0500 [thread overview]
Message-ID: <55565EB3.7040102@opensource.altera.com> (raw)
In-Reply-To: <5383549.sAl5szqT14@wuerfel>
Hi Arnd,
On 05/15/2015 05:55 AM, Arnd Bergmann wrote:
> On Wednesday 13 May 2015 16:49:47 tthayer@opensource.altera.com wrote:
>> + sdr: sdr@ffc25000 {
>> + compatible = "syscon";
>> + reg = <0xffcfb100 0x80>;
>> + };
>> +
>>
>
> A syscon node with just 128 bytes seems very odd. Can you check the
> hardware manual to see if this is part of some bigger unit?
>
> Arnd
>
This is an unfortunate legacy of our previous SDRAM controller (in the
CycloneV) which had ECC registers interspersed with registers other
drivers needed - thus the use of syscon.
In the Arria10 chip, the ECC registers are in their own partitioned
group but I kept the syscon to remain consistent with the Device Tree
bindings from the CycloneV family.
I've implemented your other suggestions. Thank you for reviewing!
Thor
prev parent reply other threads:[~2015-05-15 21:01 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-13 21:49 [PATCH 0/4] Add Altera Arria10 EDAC Support tthayer
2015-05-13 21:49 ` [PATCH 1/4] edac, altera: Generalize driver to use DT Memory size tthayer
2015-05-14 3:25 ` Dinh Nguyen
2015-05-15 11:00 ` Arnd Bergmann
2015-05-13 21:49 ` [PATCH 2/4] edac, altera: Refactor EDAC for Altera CycloneV SoC tthayer
2015-05-14 20:13 ` Dinh Nguyen
2015-05-13 21:49 ` [PATCH 3/4] edac, altera: Addition of Arria10 EDAC tthayer
2015-05-14 20:20 ` Dinh Nguyen
2015-05-14 20:38 ` Thor Thayer
2015-05-15 10:57 ` Arnd Bergmann
2015-05-13 21:49 ` [PATCH 4/4] dts, altera: Arria10 SDRAM EDAC DTS additions tthayer
2015-05-15 10:55 ` Arnd Bergmann
2015-05-15 21:01 ` Thor Thayer [this message]
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