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From: Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
To: Alban Bedel <albeu-GANU6spQydw@public.gmane.org>,
	linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Ian Campbell
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
	Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
	Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>,
	Andrew Bresticker
	<abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	Qais Yousef <qais.yousef-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>,
	Gabor Juhos <juhosg-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v4 03/12] devicetree: Add bindings for the ATH79 DDR controllers
Date: Sun, 31 May 2015 15:23:53 +0300	[thread overview]
Message-ID: <556AFD59.4080009@cogentembedded.com> (raw)
In-Reply-To: <1433029955-7346-4-git-send-email-albeu-GANU6spQydw@public.gmane.org>

Hello.

On 5/31/2015 2:52 AM, Alban Bedel wrote:

> The DDR controller of the ARxxx and AR9xxx families provides an
> interface to flush the FIFO between various devices and the DDR.
> This is mainly used by the IRQ controller to flush the FIFO before
> running the interrupt handler of such devices.

> Signed-off-by: Alban Bedel <albeu-GANU6spQydw@public.gmane.org>
> ---
> v2: * Fix the node names to respect ePAPR
> v3: * Fix some typos
>      * Really fix the node names this time
> ---
>   .../memory-controllers/ath79-ddr-controller.txt    | 35 ++++++++++++++++++++++
>   1 file changed, 35 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt

> diff --git a/Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt b/Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt
> new file mode 100644
> index 0000000..efe35a06
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt
> @@ -0,0 +1,35 @@
> +Binding for Qualcomm  Atheros AR7xxx/AR9xxx DDR controller
> +
> +The DDR controller of the ARxxx and AR9xxx families provides an interface

    s/ARxxx/AR7xxx/.

> +to flush the FIFO between various devices and the DDR. This is mainly used
> +by the IRQ controller to flush the FIFO before running the interrupt handler
> +of such devices.
> +
> +Required properties:
> +
> +- compatible: has to be "qca,<soc-type>-ddr-controller",
> +  "qca,[ar7100|ar7240]-ddr-controller" as fallback.
> +  On SoC with PCI support "qca,ar7100-ddr-controller" should be used as
> +  fallback, otherwise "qca,ar7240-ddr-controller" should be used.
> +- reg: Base address and size of the controllers memory area

    Controller's.

> +- #qca,ddr-wb-channel-cells: has to be 1, the index of the write buffer
> +  channel

    Hm, index? The expectation for such props is the # of cells.

WBR, Sergei

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  parent reply	other threads:[~2015-05-31 12:23 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-30 23:52 [PATCH v4 00/12] MIPS: ath79: Add OF support and DTS for TL-WR1043ND Alban Bedel
2015-05-31  0:18 ` [PATCH v4 08/12] MIPS: ath79: Add OF support to the clocks Alban Bedel
     [not found] ` <1433029955-7346-1-git-send-email-albeu-GANU6spQydw@public.gmane.org>
2015-05-30 23:52   ` [PATCH v4 01/12] devicetree: Add bindings for the SoC of the ATH79 family Alban Bedel
2015-05-30 23:52   ` [PATCH v4 02/12] MIPS: ath79: Add basic device tree support Alban Bedel
2015-05-30 23:52   ` [PATCH v4 03/12] devicetree: Add bindings for the ATH79 DDR controllers Alban Bedel
     [not found]     ` <1433029955-7346-4-git-send-email-albeu-GANU6spQydw@public.gmane.org>
2015-05-31 12:23       ` Sergei Shtylyov [this message]
2015-05-30 23:52   ` [PATCH v4 04/12] devicetree: Add bindings for the ATH79 interrupt controllers Alban Bedel
2015-05-30 23:52   ` [PATCH v4 05/12] devicetree: Add bindings for the ATH79 MISC " Alban Bedel
     [not found]     ` <1433029955-7346-6-git-send-email-albeu-GANU6spQydw@public.gmane.org>
2015-05-31  0:30       ` Sergey Ryazanov
2015-05-30 23:52   ` [PATCH v4 06/12] MIPS: ath79: Add OF support to the IRQ controllers Alban Bedel
2015-05-30 23:52   ` [PATCH v4 07/12] devicetree: Add bindings for the ATH79 PLL controllers Alban Bedel
2015-05-31  0:18   ` [PATCH v4 09/12] devicetree: Add bindings for the ATH79 GPIO controllers Alban Bedel
2015-05-31  0:18   ` [PATCH v4 10/12] MIPS: ath79: Add OF support to the GPIO driver Alban Bedel
2015-05-31  0:18   ` [PATCH v4 11/12] of: Add vendor prefix for TP-Link Technologies Co. Ltd Alban Bedel
2015-05-31  0:18   ` [PATCH v4 12/12] MIPS: Add basic support for the TL-WR1043ND version 1 Alban Bedel
     [not found]     ` <1433031506-7984-5-git-send-email-albeu-GANU6spQydw@public.gmane.org>
2015-06-08 10:17       ` Antony Pavlov
2015-06-10 21:58         ` Alban
2015-06-15  7:42           ` Antony Pavlov
     [not found]             ` <20150615104213.92258d2d0616c12e4aa7bf1a-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-06-20 10:51               ` Alban
2015-06-22 15:01                 ` Antony Pavlov
2015-06-22 15:11       ` Antony Pavlov
2015-06-03  7:34   ` [PATCH v4 00/12] MIPS: ath79: Add OF support and DTS for TL-WR1043ND Ralf Baechle

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