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From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
To: Dinh Nguyen
	<dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>,
	bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org,
	dougthompson-aS9lmoZGLiVWk0Htik3J/w@public.gmane.org,
	m.chehab-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org,
	grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-edac-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	tthayer.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: Re: [PATCHv2 2/4] edac, altera: Refactor EDAC for Altera CycloneV SoC.
Date: Thu, 4 Jun 2015 16:34:49 -0500	[thread overview]
Message-ID: <5570C479.7010902@opensource.altera.com> (raw)
In-Reply-To: <55706E25.8050105-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>


On 06/04/2015 10:26 AM, Dinh Nguyen wrote:
> On 06/04/2015 09:28 AM, tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:
>> From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>>
>> The Arria10 SOC uses a completely different SDRAM controller from the
>> earlier CycloneV and ArriaV SoCs. This patch abstracts the SDRAM bits
>> for the CycloneV/ArriaV SoCs in preparation for the Arria10 support.
>>
>> Signed-off-by: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
>> ---
>> v2: Make c5_data static.
>> ---
>>   drivers/edac/altera_edac.c |  194 ++++++++++++++++++++------------------------
>>   drivers/edac/altera_edac.h |  116 ++++++++++++++++++++++++++
>>   2 files changed, 206 insertions(+), 104 deletions(-)
>>   create mode 100644 drivers/edac/altera_edac.h
>>
>> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
>> index a9e7c69..a8350f6 100644
>> --- a/drivers/edac/altera_edac.c
>> +++ b/drivers/edac/altera_edac.c
>
> What branch are you basing this patch on? I get the following error when
> applied to both v4.1-rc6, linux-next, and linux-edac/linux-next.
>
> Applying: edac, altera: Refactor EDAC for Altera CycloneV SoC.
> error: patch failed: drivers/edac/altera_edac.c:400
> error: drivers/edac/altera_edac.c: patch does not apply
> Patch failed at 0001 edac, altera: Refactor EDAC for Altera CycloneV SoC.
>
> Dinh
>

OK. I'll refactor and resend. I was using Altera's internal for-next branch.
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  parent reply	other threads:[~2015-06-04 21:34 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-04 14:28 [PATCHv2 0/4] Add Altera Arria10 EDAC Support tthayer
2015-06-04 14:28 ` [PATCHv2 1/4] edac, altera: Generalize driver to use DT Memory size tthayer
2015-06-04 14:28 ` [PATCHv2 2/4] edac, altera: Refactor EDAC for Altera CycloneV SoC tthayer
2015-06-04 15:26   ` Dinh Nguyen
     [not found]     ` <55706E25.8050105-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-06-04 21:34       ` Thor Thayer [this message]
2015-06-04 22:06         ` Borislav Petkov
2015-06-04 22:27           ` Dinh Nguyen
2015-06-05  9:17             ` Borislav Petkov
2015-06-05 13:57               ` Dinh Nguyen
     [not found] ` <1433428128-7292-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-06-04 14:28   ` [PATCHv2 3/4] edac, altera: Addition of Arria10 EDAC tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2015-06-04 14:28 ` [PATCHv2 4/4] arm: socfpga: dts: Arria10 SDRAM EDAC DTS additions tthayer
2015-06-05 11:02 ` [PATCHv2 0/4] Add Altera Arria10 EDAC Support Borislav Petkov
2015-06-05 14:17   ` Dinh Nguyen

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