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Fri, 22 May 2026 02:31:23 -0700 (PDT) X-Received: by 2002:a17:90b:2584:b0:368:6159:980c with SMTP id 98e67ed59e1d1-36a676276b9mr2733193a91.20.1779442282825; Fri, 22 May 2026 02:31:22 -0700 (PDT) Received: from [10.92.193.94] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36a6772f486sm936162a91.2.2026.05.22.02.31.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 22 May 2026 02:31:22 -0700 (PDT) Message-ID: <5593d136-569e-4ba9-9a2f-e635125899aa@oss.qualcomm.com> Date: Fri, 22 May 2026 15:01:16 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] PCI: qcom: Add Support for Eliza To: Krzysztof Kozlowski Cc: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Bjorn Andersson , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org References: <20260521-eliza-v1-0-97cdbe88389d@oss.qualcomm.com> <20260521-eliza-v1-3-97cdbe88389d@oss.qualcomm.com> <20260522-discerning-sympathetic-moth-daa9e7@quoll> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: <20260522-discerning-sympathetic-moth-daa9e7@quoll> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIyMDA5MyBTYWx0ZWRfXxzIUfmQoC+UX mDfnUeDMJw1KbRvktx7gdlzxsLOAMhMWsdU4gBDc0JNCTc1ROiBniu9Gk9Ax6TKF/QCOIcwXkjm Aw9sak38a6oR1pe29/tRRGv1rEj/WXkXo04bUah88yZt+QizWxIJEc8uwomAUz6nglEEwDp8bIS gNYSHskkTCGNn2R2ttV+ISiBpgmI9vBGJVu3ZDcCQBZeXAtQKI24IQyJ10a7ipI/8BDEJFPCCE/ ESj5XvQ2avcbsQUwRS2UKerExBu6HU8AVQb3TlGF5Lr7es7voG4Nwprx/qnCH2zeYkK1yt1Scoh Q40msUpDEbX5dTLbCuIGdY0U/v79xxpxgCCWJf/Mhe29l1HZICXBh97LRBKqHf6r7AgdqjkBXyL fFTdlFJIrdkL+2eMQHLTf8pregUZd0yiD44oos1RVPsdvkB7fc/l1bDqY8tf8uetZizmzHP6bnM JwkEySrYvtqDU4hzl5A== X-Proofpoint-GUID: kxFIl9EaCEf5_GyKtoeuyO_Dg6BECtNL X-Proofpoint-ORIG-GUID: kxFIl9EaCEf5_GyKtoeuyO_Dg6BECtNL X-Authority-Analysis: v=2.4 cv=ar2CzyZV c=1 sm=1 tr=0 ts=6a10226c cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=jbukJSVhv8iEu2CO0E0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-22_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 phishscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605220093 On 5/22/2026 12:21 PM, Krzysztof Kozlowski wrote: > On Thu, May 21, 2026 at 07:35:31PM +0530, Krishna Chaitanya Chundru wrote: >> Add support for Eliza soc, which has two PCIe controllers capable >> of 8GT/s X1 and 8GT/s X2, using the cfg_1_9_0 configuration. >> >> Signed-off-by: Krishna Chaitanya Chundru >> --- >> drivers/pci/controller/dwc/pcie-qcom.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c >> index af6bf5cce65b..40f0a5f247eb 100644 >> --- a/drivers/pci/controller/dwc/pcie-qcom.c >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c >> @@ -2123,6 +2123,7 @@ static int qcom_pcie_resume_noirq(struct device *dev) >> static const struct of_device_id qcom_pcie_match[] = { >> { .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 }, >> { .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 }, >> + { .compatible = "qcom,pcie-eliza", .data = &cfg_1_9_0 }, > So compatible with sm8550. Why isn't this explained in commit msg of > the binding? No, PCIe controller is not compatible with sm8550, we are just re using the boot sequence used by the sm8550. > Anyway, drop the change, pointless. Look how other devices handle this - > do you see kaanapali here? No. As we are going to use different dts schema for this controller we can't really re-use like how we have done in kaanapali case.  kaanpali is reusing sm8550 schema, where this controller can't use sm8550 schema, as some clocks are different. - Krishna Chaitanya. > > Best regards, > Krzysztof >