devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Zhou Wang <wangzhou1@hisilicon.com>
To: Zhou Wang <wangzhou1@hisilicon.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Jingoo Han <jg1.han@samsung.com>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	Arnd Bergmann <arnd@arndb.de>,
	gabriele.paoloni@huawei.com, lorenzo.pieralisi@arm.com,
	James Morse <james.morse@arm.com>,
	Liviu.Dudau@arm.com, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	yuanzhichang@hisilicon.com, zhudacai@hisilicon.com,
	zhangjukuo@huawei.com, qiuzhenfa@hisilicon.com,
	liudongdong3@huawei.com, qiujiang@huawei.com,
	kangfenglong@huawei.com, liguozhu@hisilicon.com
Subject: Re: [PATCH v4 0/5] PCI: hisi: Add PCIe host support for Hisilicon Soc Hip05
Date: Tue, 21 Jul 2015 14:49:38 +0800	[thread overview]
Message-ID: <55ADEB82.4060404@hisilicon.com> (raw)
In-Reply-To: <1437460947-2328-1-git-send-email-wangzhou1@hisilicon.com>

Very sorry for sending this cover repeatedly :(
Please ignore this one.

Zhou

On 2015/7/21 14:42, Zhou Wang wrote:
> This patchset adds PCIe host support for Hisilicon Soc Hip05. The PCIe hosts
> use PCIe IP core from Synopsys, So this driver is base on designware PCIe driver.
> 
> Hip05 is an ARMv8 architecture Soc. It should be able to use ARM64 PCIe API in
> designeware PCIe driver. So this patch also adds ARM64 support for designware
> pcie.
> 
> This patchset is based on v4.2-rc1 and Gabriele's patch about of_pci_range
> fix[1].
> 
> Change from v3:
> - Change 1/5 to what Gabriele suggested.
> - Use win->__res.start to get *_mod_base in 2/5, this fix a bug in v3 series.
> 
> Change from v2:
> - Move struct pci_dev *dev and struct pci_sys_data *sys in
>   pcibios_align_resource in 1/5.
> - Add Gabriele's codes in 2/5 which delete unnecessary information parse and
>   use of_pci_get_host_bridge_resources for both ARM32 and ARM64.
> - Add maintainer patch 5/5.
> 
> Change from RFC v1:
> - Add 1/4 patch by Arnd which removes align_resource callback in ARM
>   pcibios_align_resource.
> - Change head file in pcie-designware from asm/hardirq.h to linux/hardirq.h.
> - Set pp->root_bus_nr = 0 in dra7xx, exynos, imx6, keystone, layerscape,
>   spear13xx.
> - Remove unnecessary parentheses of some macros in pcie-hisi.
> - Use macro to replace some magic values.
> - Merge two loops together and add some comments about it in context_config
>   function in pcie-hisi.
> - Modify some value of items in pcie node example in binding document. 
> 
> Change from RFC:
> - delete dw_pcie_setup, dw_pcie_scan_bus, dw_pcie_map_irq and struct hw_pci,
>   merge related operations into dw_pcie_host_init.
> 
> Link of v3:
> - http://www.spinics.net/lists/linux-pci/msg42539.html
> Link of v2:
> - http://www.spinics.net/lists/linux-pci/msg41844.html
> Link of RFC v1:
> - http://www.spinics.net/lists/linux-pci/msg41305.html
> Link of RFC:
> - http://www.spinics.net/lists/linux-pci/msg40434.html
> 
> [1] https://patchwork.ozlabs.org/patch/495018/
> 
> Zhou Wang (5):
>   ARM/PCI: remove align_resource in pci_sys_data
>   PCI: designware: Add ARM64 support
>   PCI: hisi: Add PCIe host support for Hisilicon Soc Hip05
>   Documentation: DT: Add Hisilicon PCIe host binding
>   MAINTAINERS: Add pcie-hisi maintainer
> 
>  .../devicetree/bindings/pci/hisilicon-pcie.txt     |  46 ++++
>  MAINTAINERS                                        |   7 +
>  arch/arm/include/asm/mach/pci.h                    |   5 -
>  arch/arm/kernel/bios32.c                           |  12 +-
>  drivers/pci/host/Kconfig                           |   5 +
>  drivers/pci/host/Makefile                          |   1 +
>  drivers/pci/host/pci-dra7xx.c                      |   1 +
>  drivers/pci/host/pci-exynos.c                      |   2 +-
>  drivers/pci/host/pci-imx6.c                        |   2 +-
>  drivers/pci/host/pci-keystone-dw.c                 |   2 +-
>  drivers/pci/host/pci-keystone.c                    |   2 +-
>  drivers/pci/host/pci-layerscape.c                  |   2 +-
>  drivers/pci/host/pcie-designware.c                 | 217 ++++++-----------
>  drivers/pci/host/pcie-designware.h                 |  10 +-
>  drivers/pci/host/pcie-hisi.c                       | 257 +++++++++++++++++++++
>  drivers/pci/host/pcie-spear13xx.c                  |   2 +-
>  16 files changed, 410 insertions(+), 163 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
>  create mode 100644 drivers/pci/host/pcie-hisi.c
> 

  reply	other threads:[~2015-07-21  6:49 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-21  6:42 [PATCH v4 0/5] PCI: hisi: Add PCIe host support for Hisilicon Soc Hip05 Zhou Wang
2015-07-21  6:49 ` Zhou Wang [this message]
  -- strict thread matches above, loose matches on Subject: below --
2015-07-21  6:48 Zhou Wang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=55ADEB82.4060404@hisilicon.com \
    --to=wangzhou1@hisilicon.com \
    --cc=Liviu.Dudau@arm.com \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gabriele.paoloni@huawei.com \
    --cc=james.morse@arm.com \
    --cc=jg1.han@samsung.com \
    --cc=kangfenglong@huawei.com \
    --cc=liguozhu@hisilicon.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=liudongdong3@huawei.com \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=pratyush.anand@gmail.com \
    --cc=qiujiang@huawei.com \
    --cc=qiuzhenfa@hisilicon.com \
    --cc=yuanzhichang@hisilicon.com \
    --cc=zhangjukuo@huawei.com \
    --cc=zhudacai@hisilicon.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).