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From: Roger Quadros <rogerq@ti.com>
To: tony@atomide.com
Cc: dwmw2@infradead.org, computersforpeace@gmail.com,
	ezequiel@vanguardiasur.com.ar, javier@dowhile0.org,
	fcooper@ti.com, nsekhar@ti.com, linux-mtd@lists.infradead.org,
	linux-omap@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 16/22] memory: omap-gpmc: Support general purpose input for WAITPINs
Date: Thu, 13 Aug 2015 14:58:09 +0300	[thread overview]
Message-ID: <55CC8651.2030600@ti.com> (raw)
In-Reply-To: <1438938752-31010-17-git-send-email-rogerq@ti.com>



On 07/08/15 12:12, Roger Quadros wrote:
> OMAPs can have 2 to 4 WAITPINs that can be used as general purpose
> input if not used for memory wait state insertion.
> 
> The first user will be the OMAP NAND chip to get the NAND
> read/busy status using gpiolib.
> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
>  drivers/memory/omap-gpmc.c | 122 +++++++++++++++++++++++++++++++++++++++++++--
>  1 file changed, 117 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c
> index 30d9c21..264009d 100644
> --- a/drivers/memory/omap-gpmc.c
> +++ b/drivers/memory/omap-gpmc.c
> @@ -21,6 +21,7 @@
>  #include <linux/spinlock.h>
>  #include <linux/io.h>
>  #include <linux/module.h>
> +#include <linux/gpio/driver.h>
>  #include <linux/interrupt.h>
>  #include <linux/platform_device.h>
>  #include <linux/of.h>
> @@ -223,6 +224,11 @@ struct omap3_gpmc_regs {
>  	struct gpmc_cs_config cs_context[GPMC_CS_NUM];
>  };
>  
> +struct gpmc_device {
> +	struct device *dev;
> +	struct gpio_chip gpio_chip;
> +};
> +
>  static struct resource	gpmc_mem_root;
>  static struct gpmc_cs_data gpmc_cs[GPMC_CS_NUM];
>  static DEFINE_SPINLOCK(gpmc_mem_lock);
> @@ -1919,10 +1925,69 @@ err:
>  	return ret;
>  }
>  
> +static int gpmc_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
> +{
> +	return 1;	/* we're input only */
> +}
> +
> +static int gpmc_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
> +{
> +	return 0;	/* we're input only */
> +}
> +
> +static int gpmc_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
> +				      int value)
> +{
> +	return -EINVAL;	/* we're input only */
> +}
> +
> +static void gpmc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
> +{
> +}
> +
> +static int gpmc_gpio_get(struct gpio_chip *chip, unsigned offset)
> +{
> +	u32 reg;
> +
> +	offset += 8;
> +
> +	reg = gpmc_read_reg(GPMC_STATUS) & BIT(offset);
> +
> +	return !!reg;
> +}
> +
> +static int gpmc_gpio_init(struct gpmc_device *gpmc)
> +{
> +	int ret;
> +
> +	gpmc->gpio_chip.dev = gpmc->dev;
> +	gpmc->gpio_chip.owner = THIS_MODULE;
> +	gpmc->gpio_chip.label = DEVICE_NAME;
> +	gpmc->gpio_chip.ngpio = gpmc_nr_waitpins;
> +	gpmc->gpio_chip.get_direction = gpmc_gpio_get_direction;
> +	gpmc->gpio_chip.direction_input = gpmc_gpio_direction_input;
> +	gpmc->gpio_chip.direction_output = gpmc_gpio_direction_output;
> +	gpmc->gpio_chip.set = gpmc_gpio_set;
> +	gpmc->gpio_chip.get = gpmc_gpio_get;
> +	gpmc->gpio_chip.base = -1;
> +
> +	ret = gpiochip_add(&gpmc->gpio_chip);
> +	if (ret < 0) {
> +		dev_err(gpmc->dev, "could not register gpio chip: %d\n", ret);
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static void gpmc_gpio_exit(struct gpmc_device *gpmc)
> +{
> +	gpiochip_remove(&gpmc->gpio_chip);
> +}
> +
>  static int gpmc_probe_dt(struct platform_device *pdev)
>  {
>  	int ret;
> -	struct device_node *child;
>  	const struct of_device_id *of_id =
>  		of_match_device(gpmc_dt_ids, &pdev->dev);
>  
> @@ -1950,6 +2015,17 @@ static int gpmc_probe_dt(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> +	dev_info(&pdev->dev, "num-cs %d, num-wait %d\n",
> +		 gpmc_cs_num, gpmc_nr_waitpins);
> +
> +	return 0;
> +}
> +
> +static int gpmc_probe_dt_children(struct platform_device *pdev)
> +{
> +	int ret;
> +	struct device_node *child;
> +
>  	for_each_available_child_of_node(pdev->dev.of_node, child) {
>  
>  		if (!child->name)
> @@ -1959,6 +2035,9 @@ static int gpmc_probe_dt(struct platform_device *pdev)
>  			ret = gpmc_probe_onenand_child(pdev, child);
>  		else
>  			ret = gpmc_probe_generic_child(pdev, child);
> +
> +		if (ret)
> +			return ret;
>  	}
>  
>  	return 0;
> @@ -1968,6 +2047,11 @@ static int gpmc_probe_dt(struct platform_device *pdev)
>  {
>  	return 0;
>  }
> +
> +static int gpmc_probe_dt_children(struct platform_device *pdev)
> +{
> +	return 0;
> +}
>  #endif
>  
>  static int gpmc_probe(struct platform_device *pdev)
> @@ -1975,6 +2059,7 @@ static int gpmc_probe(struct platform_device *pdev)
>  	int rc;
>  	u32 l;
>  	struct resource *res;
> +	struct gpmc_device *gpmc;
>  
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>  	if (res == NULL)
> @@ -2005,6 +2090,17 @@ static int gpmc_probe(struct platform_device *pdev)
>  		return -EINVAL;
>  	}
>  
> +	rc = gpmc_probe_dt(pdev);
> +	if (rc)
> +		return rc;
> +
> +	gpmc = devm_kzalloc(&pdev->dev, sizeof(*gpmc), GFP_KERNEL);
> +	if (!gpmc)
> +		return -ENOMEM;
> +
> +	gpmc->dev = &pdev->dev;
> +	platform_set_drvdata(pdev, gpmc);
> +
>  	pm_runtime_enable(&pdev->dev);
>  	pm_runtime_get_sync(&pdev->dev);
>  
> @@ -2032,24 +2128,40 @@ static int gpmc_probe(struct platform_device *pdev)
>  		 GPMC_REVISION_MINOR(l));
>  
>  	gpmc_mem_init();
> +	rc = gpmc_gpio_init(gpmc);
> +	if (rc)
> +		goto gpio_init_failed;
> +
>  
>  	if (!pdev->dev.of_node) {
>  		gpmc_cs_num	 = GPMC_CS_NUM;
>  		gpmc_nr_waitpins = GPMC_NR_WAITPINS;
>  	}

The above if {} needs to move near gpmc_probe_dt()
else we break gpmc for legacy boot.

cheers,
-roger

>  
> -	rc = gpmc_probe_dt(pdev);
> +	rc = gpmc_probe_dt_children(pdev);
>  	if (rc < 0) {
> -		pm_runtime_put_sync(&pdev->dev);
> -		dev_err(gpmc_dev, "failed to probe DT parameters\n");
> -		return rc;
> +		dev_err(gpmc_dev, "failed to probe DT children\n");
> +		goto dt_children_failed;
>  	}
>  
>  	return 0;
> +
> +dt_children_failed:
> +	gpmc_gpio_exit(gpmc);
> +gpio_init_failed:
> +	gpmc_mem_exit();
> +	pm_runtime_put_sync(&pdev->dev);
> +	pm_runtime_disable(&pdev->dev);
> +	gpmc_dev = NULL;
> +
> +	return rc;
>  }
>  
>  static int gpmc_remove(struct platform_device *pdev)
>  {
> +	struct gpmc_device *gpmc = platform_get_drvdata(pdev);
> +
> +	gpmc_gpio_exit(gpmc);
>  	gpmc_mem_exit();
>  	pm_runtime_put_sync(&pdev->dev);
>  	pm_runtime_disable(&pdev->dev);
> 

  reply	other threads:[~2015-08-13 11:58 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-07  9:12 [PATCH v2 00/22] memory: omap-gpmc: mtd: nand: Support GPMC NAND on non-OMAP platforms Roger Quadros
2015-08-07  9:12 ` [PATCH v2 01/22] ARM: OMAP2+: gpmc: Add platform data Roger Quadros
2015-08-07  9:12 ` [PATCH v2 02/22] ARM: OMAP2+: gpmc: Add gpmc timings and settings to " Roger Quadros
2015-08-07  9:12 ` [PATCH v2 03/22] memory: omap-gpmc: Introduce GPMC to NAND interface Roger Quadros
2015-08-07  9:12 ` [PATCH v2 04/22] mtd: nand: omap2: Use gpmc_omap_get_nand_ops() to get NAND registers Roger Quadros
2015-08-07  9:12 ` [PATCH v2 05/22] memory: omap-gpmc: Add GPMC-NAND ops to get writebufferempty status Roger Quadros
2015-08-07  9:12 ` [PATCH v2 06/22] mtd: nand: omap2: Switch to using GPMC-NAND ops for writebuffer empty check Roger Quadros
2015-08-13  7:18   ` Roger Quadros
2015-08-07  9:12 ` [PATCH v2 07/22] memory: omap-gpmc: Remove NAND IRQ code Roger Quadros
2015-08-07  9:12 ` [PATCH v2 08/22] memory: omap-gpmc: Add IRQ ops for GPMC-NAND interface Roger Quadros
     [not found] ` <1438938752-31010-1-git-send-email-rogerq-l0cyMroinI0@public.gmane.org>
2015-08-07  9:12   ` [PATCH v2 09/22] mtd: nand: omap2: manage NAND interrupts Roger Quadros
2015-08-07  9:12 ` [PATCH v2 10/22] mtd: nand: omap: Copy platform data parameters to omap_nand_info data Roger Quadros
2015-08-07  9:12 ` [PATCH v2 11/22] mtd: nand: omap: Clean up device tree support Roger Quadros
2015-08-07  9:12 ` [PATCH v2 12/22] mtd: nand: omap: Update DT binding documentation Roger Quadros
2015-08-07  9:12 ` [PATCH v2 13/22] memory: omap-gpmc: Prevent mapping into 1st 16MB Roger Quadros
2015-08-07  9:12 ` [PATCH v2 14/22] ARM: dts: OMAP2+: Fix NAND device nodes Roger Quadros
2015-08-07  9:12 ` [PATCH v2 15/22] memory: omap-gpmc: Move device tree binding to correct location Roger Quadros
2015-08-07  9:12 ` [PATCH v2 16/22] memory: omap-gpmc: Support general purpose input for WAITPINs Roger Quadros
2015-08-13 11:58   ` Roger Quadros [this message]
2015-08-07  9:12 ` [PATCH v2 17/22] memory: omap-gpmc: Reserve WAITPIN if needed for WAIT monitoring Roger Quadros
2015-08-07  9:12 ` [PATCH v2 18/22] memory: omap-gpmc: Add irqchip support to the gpiochip Roger Quadros
2015-08-07  9:12 ` [PATCH v2 19/22] ARM: dts: dra7: Enable gpio & interrupt controller for gpmc node Roger Quadros
2015-08-07  9:12 ` [PATCH v2 20/22] mtd: nand: omap2: Implement NAND ready using gpiolib Roger Quadros
2015-08-07  9:12 ` [PATCH v2 21/22] ARM: dts: dra7x-evm: Provide NAND ready pin Roger Quadros
2015-08-07  9:12 ` [PATCH v2 22/22] memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs Roger Quadros
2015-08-11 12:48 ` [PATCH v2 00/22] memory: omap-gpmc: mtd: nand: Support GPMC NAND on non-OMAP platforms Tony Lindgren
     [not found]   ` <20150811124829.GM4215-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2015-08-13  7:13     ` Roger Quadros
     [not found]       ` <55CC43B1.4020409-l0cyMroinI0@public.gmane.org>
2015-08-13  8:36         ` Tony Lindgren
2015-08-13 12:00           ` Roger Quadros

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