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From: "Janusz Użycki" <j.uzycki-cjVIcFy54eMe9JSWTWOYM+658FiBabzs@public.gmane.org>
To: Grant Likely
	<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Krzysztof Borgulski
	<k.borgulski-9tnw74Q4ehaHKKo6LODCOg@public.gmane.org>
Subject: [RFC PATCH] gpio-pca953x driver and PCA9536 chip
Date: Mon, 31 Aug 2015 16:26:37 +0200	[thread overview]
Message-ID: <55E4641D.7050603@elpromaelectronics.com> (raw)

Hi,

The driver sets register #02 (inversion) to 0x01 instead of 0x00 on my 
board.
Reason: device_pca953x_init() does not initialize val buffer because 
NBANK() returns
for PCA9536 ngpio=4 value 0 instead of 1.

My proposed code-patch for 3.14.17 is below.
Because I don't work on stable/next I can't deliver complete/ready patch.
Please for comments.

best regards
Janusz

--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -75,7 +75,7 @@ MODULE_DEVICE_TABLE(i2c, pca953x_id);
  #define MAX_BANK 5
  #define BANK_SZ 8

-#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
+#define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)

  struct pca953x_chip {
         unsigned gpio_start;
--
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             reply	other threads:[~2015-08-31 14:26 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-31 14:26 Janusz Użycki [this message]
     [not found] ` <55E4641D.7050603-cjVIcFy54eMe9JSWTWOYM+658FiBabzs@public.gmane.org>
2015-09-04  9:33   ` [RFC] gpio-pca953x driver and PCA9536 chip Janusz Użycki
2015-09-05 21:15 ` [RFC PATCH] " Linus Walleij
2015-09-07 12:36   ` Grygorii Strashko

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