* [PATCH v1 0/3] Support the timer on RK3368 SoC
@ 2015-09-18 8:51 Caesar Wang
2015-09-18 8:51 ` [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible Caesar Wang
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Caesar Wang @ 2015-09-18 8:51 UTC (permalink / raw)
To: heiko, daniel.lezcano, will.deacon, catalin.marinas
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-rockchip, tglx,
olof, Caesar Wang
Timer0~11 count up from zero to a programmed value and
generate an interrupt when the count reaches the programmed value.
TIMER0, TIMER1, TIMER2, Timer3, TIMER4 and TIMER5 are in the CPU
subsystem, using timer ch0 ~ ch5 respectively. The timer clock is 24MHz
OSC.
This series are found on RK3368 SoC, verified on rk3368 evb board.
Changes in v1:
- As Russell, Thomas, Daniel comments, let's replace NO_IRQ by '!irq'.
- As the Heiko comments, add the "rockchip,rk3368-timer" for timer.
Although the 'rockchip,rk3288-timer' is working for RK3368, need to add the
'rockchip,rk3368-timer' for the rk3368-spec timer in the future.
Caesar Wang (3):
clocksource: rockchip: Make the driver more readability and compatible
arm64: Enable the timer on Rockchip architecture
arm64: dts: rockchip: Add the needed timer for RK3368 SoC
arch/arm64/Kconfig.platforms | 1 +
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 ++++++
drivers/clocksource/rockchip_timer.c | 29 +++++++++++++++--------------
3 files changed, 22 insertions(+), 14 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible 2015-09-18 8:51 [PATCH v1 0/3] Support the timer on RK3368 SoC Caesar Wang @ 2015-09-18 8:51 ` Caesar Wang 2015-09-22 14:00 ` Heiko Stübner [not found] ` <1442566271-10695-1-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2015-09-18 8:51 ` [PATCH v1 3/3] arm64: dts: rockchip: Add the needed timer for RK3368 SoC Caesar Wang 2 siblings, 1 reply; 8+ messages in thread From: Caesar Wang @ 2015-09-18 8:51 UTC (permalink / raw) To: heiko, daniel.lezcano, will.deacon, catalin.marinas Cc: devicetree, linux-arm-kernel, linux-kernel, linux-rockchip, tglx, olof, Caesar Wang Build the arm64 SoCs (e.g.: RK3368) on Rockchip platform, There are some failure with build up on timer driver for rockchip. logs: ... drivers/clocksource/rockchip_timer.c:156:13: error: 'NO_IRQ' undeclared /tmp/ccdAnNy5.s:47: Error: missing immediate expression at operand 1 -- `dsb` ... The problem was different semantics of dsb on btw arm32 and arm64, Here we can convert the dsb with insteading of dsb(sy). NO_IRQ definition is missing for ARM64, since NO_IRQ being -1 is a legacy thing for ARM - all ARM drivers are supposed to be converted to use <= 0 or == 0 to detect invalid IRQs, and _eventually_ once all users are gone, NO_IRQ deleted. Modern drivers should _all_ be using !irq to detect invalid IRQs, and not using NO_IRQ. Meanwhile, I change a bit to make the code more readability for driver when I check the code style. Signed-off-by: Caesar Wang <wxt@rock-chips.com> --- Changes in v1: - As Russell, Thomas, Daniel comments, let's replace NO_IRQ by '!irq'. drivers/clocksource/rockchip_timer.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/clocksource/rockchip_timer.c b/drivers/clocksource/rockchip_timer.c index bb2c2b0..e1af449 100644 --- a/drivers/clocksource/rockchip_timer.c +++ b/drivers/clocksource/rockchip_timer.c @@ -17,16 +17,16 @@ #define TIMER_NAME "rk_timer" -#define TIMER_LOAD_COUNT0 0x00 -#define TIMER_LOAD_COUNT1 0x04 -#define TIMER_CONTROL_REG 0x10 -#define TIMER_INT_STATUS 0x18 +#define TIMER_LOAD_COUNT0 0x00 +#define TIMER_LOAD_COUNT1 0x04 +#define TIMER_CONTROL_REG 0x10 +#define TIMER_INT_STATUS 0x18 -#define TIMER_DISABLE 0x0 -#define TIMER_ENABLE 0x1 -#define TIMER_MODE_FREE_RUNNING (0 << 1) -#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) -#define TIMER_INT_UNMASK (1 << 2) +#define TIMER_DISABLE (0 << 0) +#define TIMER_ENABLE (1 << 0) +#define TIMER_MODE_FREE_RUNNING (0 << 1) +#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) +#define TIMER_INT_UNMASK (1 << 2) struct bc_timer { struct clock_event_device ce; @@ -49,14 +49,14 @@ static inline void __iomem *rk_base(struct clock_event_device *ce) static inline void rk_timer_disable(struct clock_event_device *ce) { writel_relaxed(TIMER_DISABLE, rk_base(ce) + TIMER_CONTROL_REG); - dsb(); + dsb(sy); } static inline void rk_timer_enable(struct clock_event_device *ce, u32 flags) { writel_relaxed(TIMER_ENABLE | TIMER_INT_UNMASK | flags, rk_base(ce) + TIMER_CONTROL_REG); - dsb(); + dsb(sy); } static void rk_timer_update_counter(unsigned long cycles, @@ -64,13 +64,13 @@ static void rk_timer_update_counter(unsigned long cycles, { writel_relaxed(cycles, rk_base(ce) + TIMER_LOAD_COUNT0); writel_relaxed(0, rk_base(ce) + TIMER_LOAD_COUNT1); - dsb(); + dsb(sy); } static void rk_timer_interrupt_clear(struct clock_event_device *ce) { writel_relaxed(1, rk_base(ce) + TIMER_INT_STATUS); - dsb(); + dsb(sy); } static inline int rk_timer_set_next_event(unsigned long cycles, @@ -148,7 +148,7 @@ static void __init rk_timer_init(struct device_node *np) bc_timer.freq = clk_get_rate(timer_clk); irq = irq_of_parse_and_map(np, 0); - if (irq == NO_IRQ) { + if (!irq) { pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME); return; } @@ -173,4 +173,5 @@ static void __init rk_timer_init(struct device_node *np) clockevents_config_and_register(ce, bc_timer.freq, 1, UINT_MAX); } + CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", rk_timer_init); -- 1.9.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible 2015-09-18 8:51 ` [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible Caesar Wang @ 2015-09-22 14:00 ` Heiko Stübner 2015-09-22 14:15 ` Caesar Wang 0 siblings, 1 reply; 8+ messages in thread From: Heiko Stübner @ 2015-09-22 14:00 UTC (permalink / raw) To: Caesar Wang Cc: daniel.lezcano, will.deacon, catalin.marinas, devicetree, linux-arm-kernel, linux-kernel, linux-rockchip, tglx, olof Hi Caesar, Am Freitag, 18. September 2015, 16:51:09 schrieb Caesar Wang: > Build the arm64 SoCs (e.g.: RK3368) on Rockchip platform, > There are some failure with build up on timer driver for rockchip. > > logs: > ... > drivers/clocksource/rockchip_timer.c:156:13: error: 'NO_IRQ' undeclared > /tmp/ccdAnNy5.s:47: Error: missing immediate expression at operand 1 -- > `dsb` > ... > > The problem was different semantics of dsb on btw arm32 and arm64, > Here we can convert the dsb with insteading of dsb(sy). > > NO_IRQ definition is missing for ARM64, since NO_IRQ being -1 is a > legacy thing for ARM - all ARM drivers are supposed to be converted to > use <= 0 or == 0 to detect invalid IRQs, and _eventually_ once all users > are gone, NO_IRQ deleted. Modern drivers should _all_ be using !irq to > detect invalid IRQs, and not using NO_IRQ. > > Meanwhile, I change a bit to make the code more readability for driver > when I check the code style. > > Signed-off-by: Caesar Wang <wxt@rock-chips.com> > --- > > Changes in v1: > - As Russell, Thomas, Daniel comments, let's replace NO_IRQ by '!irq'. > > drivers/clocksource/rockchip_timer.c | 29 +++++++++++++++-------------- > 1 file changed, 15 insertions(+), 14 deletions(-) > > diff --git a/drivers/clocksource/rockchip_timer.c > b/drivers/clocksource/rockchip_timer.c index bb2c2b0..e1af449 100644 > --- a/drivers/clocksource/rockchip_timer.c > +++ b/drivers/clocksource/rockchip_timer.c > @@ -17,16 +17,16 @@ > > #define TIMER_NAME "rk_timer" > > -#define TIMER_LOAD_COUNT0 0x00 > -#define TIMER_LOAD_COUNT1 0x04 > -#define TIMER_CONTROL_REG 0x10 > -#define TIMER_INT_STATUS 0x18 > +#define TIMER_LOAD_COUNT0 0x00 > +#define TIMER_LOAD_COUNT1 0x04 > +#define TIMER_CONTROL_REG 0x10 > +#define TIMER_INT_STATUS 0x18 > > -#define TIMER_DISABLE 0x0 > -#define TIMER_ENABLE 0x1 > -#define TIMER_MODE_FREE_RUNNING (0 << 1) > -#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) > -#define TIMER_INT_UNMASK (1 << 2) > +#define TIMER_DISABLE (0 << 0) > +#define TIMER_ENABLE (1 << 0) > +#define TIMER_MODE_FREE_RUNNING (0 << 1) > +#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) > +#define TIMER_INT_UNMASK (1 << 2) not sure how Daniel sees this, but those could count as "unrelated change", as they have nothing to do with the arm64 build-fixes. > > struct bc_timer { > struct clock_event_device ce; > @@ -49,14 +49,14 @@ static inline void __iomem *rk_base(struct > clock_event_device *ce) static inline void rk_timer_disable(struct > clock_event_device *ce) { > writel_relaxed(TIMER_DISABLE, rk_base(ce) + TIMER_CONTROL_REG); > - dsb(); > + dsb(sy); > } > > static inline void rk_timer_enable(struct clock_event_device *ce, u32 > flags) { > writel_relaxed(TIMER_ENABLE | TIMER_INT_UNMASK | flags, > rk_base(ce) + TIMER_CONTROL_REG); > - dsb(); > + dsb(sy); > } > > static void rk_timer_update_counter(unsigned long cycles, > @@ -64,13 +64,13 @@ static void rk_timer_update_counter(unsigned long > cycles, { > writel_relaxed(cycles, rk_base(ce) + TIMER_LOAD_COUNT0); > writel_relaxed(0, rk_base(ce) + TIMER_LOAD_COUNT1); > - dsb(); > + dsb(sy); > } > > static void rk_timer_interrupt_clear(struct clock_event_device *ce) > { > writel_relaxed(1, rk_base(ce) + TIMER_INT_STATUS); > - dsb(); > + dsb(sy); > } > > static inline int rk_timer_set_next_event(unsigned long cycles, > @@ -148,7 +148,7 @@ static void __init rk_timer_init(struct device_node *np) > bc_timer.freq = clk_get_rate(timer_clk); > > irq = irq_of_parse_and_map(np, 0); > - if (irq == NO_IRQ) { > + if (!irq) { > pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME); > return; > } > @@ -173,4 +173,5 @@ static void __init rk_timer_init(struct device_node *np) > > clockevents_config_and_register(ce, bc_timer.freq, 1, UINT_MAX); > } > + unnecessary addition of a blank line (same reasons as above) > CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", rk_timer_init); Heiko ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible 2015-09-22 14:00 ` Heiko Stübner @ 2015-09-22 14:15 ` Caesar Wang [not found] ` <56016275.4080704-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 0 siblings, 1 reply; 8+ messages in thread From: Caesar Wang @ 2015-09-22 14:15 UTC (permalink / raw) To: Heiko Stübner Cc: Caesar Wang, devicetree, catalin.marinas, daniel.lezcano, will.deacon, linux-kernel, linux-rockchip, olof, tglx, linux-arm-kernel Hi Heiko, 在 2015年09月22日 22:00, Heiko Stübner 写道: > Hi Caesar, > > Am Freitag, 18. September 2015, 16:51:09 schrieb Caesar Wang: >> Build the arm64 SoCs (e.g.: RK3368) on Rockchip platform, >> There are some failure with build up on timer driver for rockchip. >> >> logs: >> ... >> drivers/clocksource/rockchip_timer.c:156:13: error: 'NO_IRQ' undeclared >> /tmp/ccdAnNy5.s:47: Error: missing immediate expression at operand 1 -- >> `dsb` >> ... >> >> The problem was different semantics of dsb on btw arm32 and arm64, >> Here we can convert the dsb with insteading of dsb(sy). >> >> NO_IRQ definition is missing for ARM64, since NO_IRQ being -1 is a >> legacy thing for ARM - all ARM drivers are supposed to be converted to >> use <= 0 or == 0 to detect invalid IRQs, and _eventually_ once all users >> are gone, NO_IRQ deleted. Modern drivers should _all_ be using !irq to >> detect invalid IRQs, and not using NO_IRQ. >> >> Meanwhile, I change a bit to make the code more readability for driver >> when I check the code style. >> >> Signed-off-by: Caesar Wang <wxt@rock-chips.com> >> --- >> >> Changes in v1: >> - As Russell, Thomas, Daniel comments, let's replace NO_IRQ by '!irq'. >> >> drivers/clocksource/rockchip_timer.c | 29 +++++++++++++++-------------- >> 1 file changed, 15 insertions(+), 14 deletions(-) >> >> diff --git a/drivers/clocksource/rockchip_timer.c >> b/drivers/clocksource/rockchip_timer.c index bb2c2b0..e1af449 100644 >> --- a/drivers/clocksource/rockchip_timer.c >> +++ b/drivers/clocksource/rockchip_timer.c >> @@ -17,16 +17,16 @@ >> >> #define TIMER_NAME "rk_timer" >> >> -#define TIMER_LOAD_COUNT0 0x00 >> -#define TIMER_LOAD_COUNT1 0x04 >> -#define TIMER_CONTROL_REG 0x10 >> -#define TIMER_INT_STATUS 0x18 >> +#define TIMER_LOAD_COUNT0 0x00 >> +#define TIMER_LOAD_COUNT1 0x04 >> +#define TIMER_CONTROL_REG 0x10 >> +#define TIMER_INT_STATUS 0x18 >> >> -#define TIMER_DISABLE 0x0 >> -#define TIMER_ENABLE 0x1 >> -#define TIMER_MODE_FREE_RUNNING (0 << 1) >> -#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) >> -#define TIMER_INT_UNMASK (1 << 2) >> +#define TIMER_DISABLE (0 << 0) >> +#define TIMER_ENABLE (1 << 0) >> +#define TIMER_MODE_FREE_RUNNING (0 << 1) >> +#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) >> +#define TIMER_INT_UNMASK (1 << 2) > not sure how Daniel sees this, but those could count as "unrelated change", as > they have nothing to do with the arm64 build-fixes. Yep, it's no related to the arm64 uild fixes. I only make the code more readability for driver. > >> struct bc_timer { >> struct clock_event_device ce; >> @@ -49,14 +49,14 @@ static inline void __iomem *rk_base(struct >> clock_event_device *ce) static inline void rk_timer_disable(struct >> clock_event_device *ce) { >> writel_relaxed(TIMER_DISABLE, rk_base(ce) + TIMER_CONTROL_REG); >> - dsb(); >> + dsb(sy); >> } >> >> static inline void rk_timer_enable(struct clock_event_device *ce, u32 >> flags) { >> writel_relaxed(TIMER_ENABLE | TIMER_INT_UNMASK | flags, >> rk_base(ce) + TIMER_CONTROL_REG); >> - dsb(); >> + dsb(sy); >> } >> >> static void rk_timer_update_counter(unsigned long cycles, >> @@ -64,13 +64,13 @@ static void rk_timer_update_counter(unsigned long >> cycles, { >> writel_relaxed(cycles, rk_base(ce) + TIMER_LOAD_COUNT0); >> writel_relaxed(0, rk_base(ce) + TIMER_LOAD_COUNT1); >> - dsb(); >> + dsb(sy); >> } >> >> static void rk_timer_interrupt_clear(struct clock_event_device *ce) >> { >> writel_relaxed(1, rk_base(ce) + TIMER_INT_STATUS); >> - dsb(); >> + dsb(sy); >> } >> >> static inline int rk_timer_set_next_event(unsigned long cycles, >> @@ -148,7 +148,7 @@ static void __init rk_timer_init(struct device_node *np) >> bc_timer.freq = clk_get_rate(timer_clk); >> >> irq = irq_of_parse_and_map(np, 0); >> - if (irq == NO_IRQ) { >> + if (!irq) { >> pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME); >> return; >> } >> @@ -173,4 +173,5 @@ static void __init rk_timer_init(struct device_node *np) >> >> clockevents_config_and_register(ce, bc_timer.freq, 1, UINT_MAX); >> } >> + > unnecessary addition of a blank line (same reasons as above) It's the same reason with the above. CHECK: Please use a blank line after function/struct/union/enum declarations #176: FILE: rockchip_timer.c:176: +} +CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", rk_timer_init); I know, we can ignore the above warning. That's a bit better, I thnik. >> CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", rk_timer_init); > > Heiko > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip -- ************************************************************************************** 王晓腾 Caesar Wang Product R&D Dept.III Fuzhou Rockchip Electronics Co.Ltd Addr： NO.18 Building, A District, Fuzhou Software Park,Gulou District,Fuzhou, Fujian,China(Fuzhou Headquarters) 21F,Malata Building,Kejizhongyi Avenue,Nanshan District,Shenzhen (Shenzhen Office) Tel：+86-591-83991906/07 - 8221 Mobile:+86 15059456742 E-mail : wxt@rock-chips.com *************************************************************************************** *************************************************************************************** IMPORTANT NOTICE: This email is from Fuzhou Rockchip Electronics Co., Ltd .The contents of this email and any attachments may contain information that is privileged, confidential and/or exempt from disclosure under applicable law and relevant NDA. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information is STRICTLY PROHIBITED. Please immediately contact the sender as soon as possible and destroy the material in its entirety in any format. Thank you. *************************************************************************************** ^ permalink raw reply [flat|nested] 8+ messages in thread
[parent not found: <56016275.4080704-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* Re: [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible [not found] ` <56016275.4080704-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2015-09-25 0:25 ` Daniel Lezcano [not found] ` <56049476.1040605-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 0 siblings, 1 reply; 8+ messages in thread From: Daniel Lezcano @ 2015-09-25 0:25 UTC (permalink / raw) To: Caesar Wang, Heiko Stübner Cc: Caesar Wang, devicetree-u79uwXL29TY76Z2rM5mHXA, catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, olof-nZhT3qVonbNeoWH0uzbU5w, tglx-hfZtesqFncYOwBW4kG4KsQ, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Hi Caesar, so thinking a bit more about this patch. I would like to split it into two. One fixing the NO_IRQ and another fixing the dsb(). IIUC, the ARMv8 support is not yet ready and dsb() is not necessary as a fix for the previous kernel version. However, the timer is used with the ARMv7 boards and the NO_IRQ should be merged into tip-urgent. I already done the fix and I am ready to submit it (for the timer keystone also). So I suggest your resend the dsb() fix only. Regarding the indentation, I prefer you do that in a separate patch by cleaning up the macros (if relevant) or send the patch to trivial@ -- Daniel On 09/22/2015 07:15 AM, Caesar Wang wrote: > Hi Heiko, > > 在 2015年09月22日 22:00, Heiko Stübner 写道: >> Hi Caesar, >> >> Am Freitag, 18. September 2015, 16:51:09 schrieb Caesar Wang: >>> Build the arm64 SoCs (e.g.: RK3368) on Rockchip platform, >>> There are some failure with build up on timer driver for rockchip. >>> >>> logs: >>> ... >>> drivers/clocksource/rockchip_timer.c:156:13: error: 'NO_IRQ' undeclared >>> /tmp/ccdAnNy5.s:47: Error: missing immediate expression at operand 1 -- >>> `dsb` >>> ... >>> >>> The problem was different semantics of dsb on btw arm32 and arm64, >>> Here we can convert the dsb with insteading of dsb(sy). >>> >>> NO_IRQ definition is missing for ARM64, since NO_IRQ being -1 is a >>> legacy thing for ARM - all ARM drivers are supposed to be converted to >>> use <= 0 or == 0 to detect invalid IRQs, and _eventually_ once all users >>> are gone, NO_IRQ deleted. Modern drivers should _all_ be using !irq to >>> detect invalid IRQs, and not using NO_IRQ. >>> >>> Meanwhile, I change a bit to make the code more readability for driver >>> when I check the code style. >>> >>> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org> >>> --- >>> >>> Changes in v1: >>> - As Russell, Thomas, Daniel comments, let's replace NO_IRQ by '!irq'. >>> >>> drivers/clocksource/rockchip_timer.c | 29 >>> +++++++++++++++-------------- >>> 1 file changed, 15 insertions(+), 14 deletions(-) >>> >>> diff --git a/drivers/clocksource/rockchip_timer.c >>> b/drivers/clocksource/rockchip_timer.c index bb2c2b0..e1af449 100644 >>> --- a/drivers/clocksource/rockchip_timer.c >>> +++ b/drivers/clocksource/rockchip_timer.c >>> @@ -17,16 +17,16 @@ >>> >>> #define TIMER_NAME "rk_timer" >>> >>> -#define TIMER_LOAD_COUNT0 0x00 >>> -#define TIMER_LOAD_COUNT1 0x04 >>> -#define TIMER_CONTROL_REG 0x10 >>> -#define TIMER_INT_STATUS 0x18 >>> +#define TIMER_LOAD_COUNT0 0x00 >>> +#define TIMER_LOAD_COUNT1 0x04 >>> +#define TIMER_CONTROL_REG 0x10 >>> +#define TIMER_INT_STATUS 0x18 >>> >>> -#define TIMER_DISABLE 0x0 >>> -#define TIMER_ENABLE 0x1 >>> -#define TIMER_MODE_FREE_RUNNING (0 << 1) >>> -#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) >>> -#define TIMER_INT_UNMASK (1 << 2) >>> +#define TIMER_DISABLE (0 << 0) >>> +#define TIMER_ENABLE (1 << 0) >>> +#define TIMER_MODE_FREE_RUNNING (0 << 1) >>> +#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) >>> +#define TIMER_INT_UNMASK (1 << 2) >> not sure how Daniel sees this, but those could count as "unrelated >> change", as >> they have nothing to do with the arm64 build-fixes. > > Yep, it's no related to the arm64 uild fixes. > I only make the code more readability for driver. > >> >>> struct bc_timer { >>> struct clock_event_device ce; >>> @@ -49,14 +49,14 @@ static inline void __iomem *rk_base(struct >>> clock_event_device *ce) static inline void rk_timer_disable(struct >>> clock_event_device *ce) { >>> writel_relaxed(TIMER_DISABLE, rk_base(ce) + TIMER_CONTROL_REG); >>> - dsb(); >>> + dsb(sy); >>> } >>> >>> static inline void rk_timer_enable(struct clock_event_device *ce, u32 >>> flags) { >>> writel_relaxed(TIMER_ENABLE | TIMER_INT_UNMASK | flags, >>> rk_base(ce) + TIMER_CONTROL_REG); >>> - dsb(); >>> + dsb(sy); >>> } >>> >>> static void rk_timer_update_counter(unsigned long cycles, >>> @@ -64,13 +64,13 @@ static void rk_timer_update_counter(unsigned long >>> cycles, { >>> writel_relaxed(cycles, rk_base(ce) + TIMER_LOAD_COUNT0); >>> writel_relaxed(0, rk_base(ce) + TIMER_LOAD_COUNT1); >>> - dsb(); >>> + dsb(sy); >>> } >>> >>> static void rk_timer_interrupt_clear(struct clock_event_device *ce) >>> { >>> writel_relaxed(1, rk_base(ce) + TIMER_INT_STATUS); >>> - dsb(); >>> + dsb(sy); >>> } >>> >>> static inline int rk_timer_set_next_event(unsigned long cycles, >>> @@ -148,7 +148,7 @@ static void __init rk_timer_init(struct >>> device_node *np) >>> bc_timer.freq = clk_get_rate(timer_clk); >>> >>> irq = irq_of_parse_and_map(np, 0); >>> - if (irq == NO_IRQ) { >>> + if (!irq) { >>> pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME); >>> return; >>> } >>> @@ -173,4 +173,5 @@ static void __init rk_timer_init(struct >>> device_node *np) >>> >>> clockevents_config_and_register(ce, bc_timer.freq, 1, UINT_MAX); >>> } >>> + >> unnecessary addition of a blank line (same reasons as above) > > It's the same reason with the above. > > CHECK: Please use a blank line after function/struct/union/enum > declarations > #176: FILE: rockchip_timer.c:176: > +} > +CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", rk_timer_init); > > I know, we can ignore the above warning. > That's a bit better, I thnik. > > >>> CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", >>> rk_timer_init); >> >> Heiko >> >> _______________________________________________ >> Linux-rockchip mailing list >> Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org >> http://lists.infradead.org/mailman/listinfo/linux-rockchip > > -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 8+ messages in thread
[parent not found: <56049476.1040605-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>]
* Re: [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible [not found] ` <56049476.1040605-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> @ 2015-09-25 2:18 ` Caesar Wang 0 siblings, 0 replies; 8+ messages in thread From: Caesar Wang @ 2015-09-25 2:18 UTC (permalink / raw) To: Daniel Lezcano Cc: Caesar Wang, Heiko Stübner, devicetree-u79uwXL29TY76Z2rM5mHXA, catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, olof-nZhT3qVonbNeoWH0uzbU5w, tglx-hfZtesqFncYOwBW4kG4KsQ, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Daniel, 在 2015年09月25日 08:25, Daniel Lezcano 写道: > > Hi Caesar, > > so thinking a bit more about this patch. I would like to split it into > two. One fixing the NO_IRQ and another fixing the dsb(). > > IIUC, the ARMv8 support is not yet ready and dsb() is not necessary as > a fix for the previous kernel version. However, the timer is used with > the ARMv7 boards and the NO_IRQ should be merged into tip-urgent. > > I already done the fix and I am ready to submit it (for the timer > keystone also). So I suggest your resend the dsb() fix only. > > Regarding the indentation, I prefer you do that in a separate patch by > cleaning up the macros (if relevant) or send the patch to trivial@ > I know the indentation is trivial for this driver, but I just send the patch v2. > -- Daniel > > On 09/22/2015 07:15 AM, Caesar Wang wrote: >> Hi Heiko, >> >> 在 2015年09月22日 22:00, Heiko Stübner 写道: >>> Hi Caesar, >>> >>> Am Freitag, 18. September 2015, 16:51:09 schrieb Caesar Wang: >>>> Build the arm64 SoCs (e.g.: RK3368) on Rockchip platform, >>>> There are some failure with build up on timer driver for rockchip. >>>> >>>> logs: >>>> ... >>>> drivers/clocksource/rockchip_timer.c:156:13: error: 'NO_IRQ' >>>> undeclared >>>> /tmp/ccdAnNy5.s:47: Error: missing immediate expression at operand >>>> 1 -- >>>> `dsb` >>>> ... >>>> >>>> The problem was different semantics of dsb on btw arm32 and arm64, >>>> Here we can convert the dsb with insteading of dsb(sy). >>>> >>>> NO_IRQ definition is missing for ARM64, since NO_IRQ being -1 is a >>>> legacy thing for ARM - all ARM drivers are supposed to be converted to >>>> use <= 0 or == 0 to detect invalid IRQs, and _eventually_ once all >>>> users >>>> are gone, NO_IRQ deleted. Modern drivers should _all_ be using !irq to >>>> detect invalid IRQs, and not using NO_IRQ. >>>> >>>> Meanwhile, I change a bit to make the code more readability for driver >>>> when I check the code style. >>>> >>>> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org> >>>> --- >>>> >>>> Changes in v1: >>>> - As Russell, Thomas, Daniel comments, let's replace NO_IRQ by '!irq'. >>>> >>>> drivers/clocksource/rockchip_timer.c | 29 >>>> +++++++++++++++-------------- >>>> 1 file changed, 15 insertions(+), 14 deletions(-) >>>> >>>> diff --git a/drivers/clocksource/rockchip_timer.c >>>> b/drivers/clocksource/rockchip_timer.c index bb2c2b0..e1af449 100644 >>>> --- a/drivers/clocksource/rockchip_timer.c >>>> +++ b/drivers/clocksource/rockchip_timer.c >>>> @@ -17,16 +17,16 @@ >>>> >>>> #define TIMER_NAME "rk_timer" >>>> >>>> -#define TIMER_LOAD_COUNT0 0x00 >>>> -#define TIMER_LOAD_COUNT1 0x04 >>>> -#define TIMER_CONTROL_REG 0x10 >>>> -#define TIMER_INT_STATUS 0x18 >>>> +#define TIMER_LOAD_COUNT0 0x00 >>>> +#define TIMER_LOAD_COUNT1 0x04 >>>> +#define TIMER_CONTROL_REG 0x10 >>>> +#define TIMER_INT_STATUS 0x18 >>>> >>>> -#define TIMER_DISABLE 0x0 >>>> -#define TIMER_ENABLE 0x1 >>>> -#define TIMER_MODE_FREE_RUNNING (0 << 1) >>>> -#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) >>>> -#define TIMER_INT_UNMASK (1 << 2) >>>> +#define TIMER_DISABLE (0 << 0) >>>> +#define TIMER_ENABLE (1 << 0) >>>> +#define TIMER_MODE_FREE_RUNNING (0 << 1) >>>> +#define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) >>>> +#define TIMER_INT_UNMASK (1 << 2) >>> not sure how Daniel sees this, but those could count as "unrelated >>> change", as >>> they have nothing to do with the arm64 build-fixes. >> >> Yep, it's no related to the arm64 uild fixes. >> I only make the code more readability for driver. >> >>> >>>> struct bc_timer { >>>> struct clock_event_device ce; >>>> @@ -49,14 +49,14 @@ static inline void __iomem *rk_base(struct >>>> clock_event_device *ce) static inline void rk_timer_disable(struct >>>> clock_event_device *ce) { >>>> writel_relaxed(TIMER_DISABLE, rk_base(ce) + TIMER_CONTROL_REG); >>>> - dsb(); >>>> + dsb(sy); >>>> } >>>> >>>> static inline void rk_timer_enable(struct clock_event_device *ce, >>>> u32 >>>> flags) { >>>> writel_relaxed(TIMER_ENABLE | TIMER_INT_UNMASK | flags, >>>> rk_base(ce) + TIMER_CONTROL_REG); >>>> - dsb(); >>>> + dsb(sy); >>>> } >>>> >>>> static void rk_timer_update_counter(unsigned long cycles, >>>> @@ -64,13 +64,13 @@ static void rk_timer_update_counter(unsigned long >>>> cycles, { >>>> writel_relaxed(cycles, rk_base(ce) + TIMER_LOAD_COUNT0); >>>> writel_relaxed(0, rk_base(ce) + TIMER_LOAD_COUNT1); >>>> - dsb(); >>>> + dsb(sy); >>>> } >>>> >>>> static void rk_timer_interrupt_clear(struct clock_event_device *ce) >>>> { >>>> writel_relaxed(1, rk_base(ce) + TIMER_INT_STATUS); >>>> - dsb(); >>>> + dsb(sy); >>>> } >>>> >>>> static inline int rk_timer_set_next_event(unsigned long cycles, >>>> @@ -148,7 +148,7 @@ static void __init rk_timer_init(struct >>>> device_node *np) >>>> bc_timer.freq = clk_get_rate(timer_clk); >>>> >>>> irq = irq_of_parse_and_map(np, 0); >>>> - if (irq == NO_IRQ) { >>>> + if (!irq) { >>>> pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME); >>>> return; >>>> } >>>> @@ -173,4 +173,5 @@ static void __init rk_timer_init(struct >>>> device_node *np) >>>> >>>> clockevents_config_and_register(ce, bc_timer.freq, 1, UINT_MAX); >>>> } >>>> + >>> unnecessary addition of a blank line (same reasons as above) >> >> It's the same reason with the above. >> >> CHECK: Please use a blank line after function/struct/union/enum >> declarations >> #176: FILE: rockchip_timer.c:176: >> +} >> +CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", >> rk_timer_init); >> >> I know, we can ignore the above warning. >> That's a bit better, I thnik. >> >> >>>> CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", >>>> rk_timer_init); >>> >>> Heiko >>> >>> _______________________________________________ >>> Linux-rockchip mailing list >>> Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org >>> http://lists.infradead.org/mailman/listinfo/linux-rockchip >> >> > > > > -- > Thanks, > Caesar -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 8+ messages in thread
[parent not found: <1442566271-10695-1-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* [PATCH v1 2/3] arm64: Enable the timer on Rockchip architecture [not found] ` <1442566271-10695-1-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2015-09-18 8:51 ` Caesar Wang 0 siblings, 0 replies; 8+ messages in thread From: Caesar Wang @ 2015-09-18 8:51 UTC (permalink / raw) To: heiko-4mtYJXux2i+zQB+pC5nmwQ, daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A, will.deacon-5wv7dgnIgG8, catalin.marinas-5wv7dgnIgG8 Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, olof-nZhT3qVonbNeoWH0uzbU5w, tglx-hfZtesqFncYOwBW4kG4KsQ, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Caesar Wang On the RK3368 SoC, support the APB timers for rockchip platform. Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org> --- Changes in v1: None arch/arm64/Kconfig.platforms | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 23800a1..0dae08d 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -57,6 +57,7 @@ config ARCH_ROCKCHIP select ARCH_REQUIRE_GPIOLIB select PINCTRL select PINCTRL_ROCKCHIP + select ROCKCHIP_TIMER help This enables support for the ARMv8 based Rockchip chipsets, like the RK3368. -- 1.9.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v1 3/3] arm64: dts: rockchip: Add the needed timer for RK3368 SoC 2015-09-18 8:51 [PATCH v1 0/3] Support the timer on RK3368 SoC Caesar Wang 2015-09-18 8:51 ` [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible Caesar Wang [not found] ` <1442566271-10695-1-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2015-09-18 8:51 ` Caesar Wang 2 siblings, 0 replies; 8+ messages in thread From: Caesar Wang @ 2015-09-18 8:51 UTC (permalink / raw) To: heiko, daniel.lezcano, will.deacon, catalin.marinas Cc: devicetree, linux-arm-kernel, linux-kernel, linux-rockchip, tglx, olof, Caesar Wang There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. Signed-off-by: Caesar Wang <wxt@rock-chips.com> --- Changes in v1: - As the Heiko comments, add the "rockchip,rk3368-timer" for timer. Although the 'rockchip,rk3288-timer' is working for RK3368, need to add the 'rockchip,rk3368-timer' for the rk3368-spec timer in the future. arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index a712bea..c4b3870 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -214,6 +214,12 @@ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; }; + timer@ff810000 { + compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer"; + reg = <0x0 0xff810000 0x0 0x20>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + }; + xin24m: oscillator { compatible = "fixed-clock"; clock-frequency = <24000000>; -- 1.9.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2015-09-25 2:18 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2015-09-18 8:51 [PATCH v1 0/3] Support the timer on RK3368 SoC Caesar Wang
2015-09-18 8:51 ` [PATCH v1 1/3] clocksource: rockchip: Make the driver more readability and compatible Caesar Wang
2015-09-22 14:00 ` Heiko Stübner
2015-09-22 14:15 ` Caesar Wang
[not found] ` <56016275.4080704-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-09-25 0:25 ` Daniel Lezcano
[not found] ` <56049476.1040605-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-09-25 2:18 ` Caesar Wang
[not found] ` <1442566271-10695-1-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-09-18 8:51 ` [PATCH v1 2/3] arm64: Enable the timer on Rockchip architecture Caesar Wang
2015-09-18 8:51 ` [PATCH v1 3/3] arm64: dts: rockchip: Add the needed timer for RK3368 SoC Caesar Wang
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