devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: zhangsenchuan <zhangsenchuan@eswincomputing.com>
To: "Christian Bruel" <christian.bruel@foss.st.com>
Cc: bhelgaas@google.com, mani@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, lpieralisi@kernel.org,
	kwilczynski@kernel.org, robh@kernel.org, p.zabel@pengutronix.de,
	jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, mayank.rana@oss.qualcomm.com,
	shradha.t@samsung.com, krishna.chundru@oss.qualcomm.com,
	thippeswamy.havalige@amd.com, inochiama@gmail.com,
	Frank.li@nxp.com, ningyu@eswincomputing.com,
	linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com,
	ouyanghui@eswincomputing.com
Subject: Re: Re: [PATCH v7 3/3] PCI: dwc: Add no_pme_handshake flag and skip PME_Turn_Off broadcast
Date: Fri, 5 Dec 2025 18:24:33 +0800 (GMT+08:00)	[thread overview]
Message-ID: <560d3705.f47.19aee0abfc2.Coremail.zhangsenchuan@eswincomputing.com> (raw)
In-Reply-To: <0d37ef61-4407-470b-975d-5f7a147f7f10@foss.st.com>




> -----Original Messages-----
> From: "Christian Bruel" <christian.bruel@foss.st.com>
> Send time:Wednesday, 03/12/2025 18:09:06
> To: zhangsenchuan@eswincomputing.com, bhelgaas@google.com, mani@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, p.zabel@pengutronix.de, jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mayank.rana@oss.qualcomm.com, shradha.t@samsung.com, krishna.chundru@oss.qualcomm.com, thippeswamy.havalige@amd.com, inochiama@gmail.com, Frank.li@nxp.com
> Cc: ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, ouyanghui@eswincomputing.com
> Subject: Re: [PATCH v7 3/3] PCI: dwc: Add no_pme_handshake flag and skip PME_Turn_Off broadcast
> 
> Hello,
> 
> On 12/2/25 10:04, zhangsenchuan@eswincomputing.com wrote:
> > From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > 
> > The ESWIN EIC7700 SoC lacks hardware support for the L2/L3 low-power
> > link states. It cannot enter the L2/L3 ready state through the
> > PME_Turn_Off/PME_To_Ack handshake protocol. To address this, add a
> > no_pme_handshake flag skip PME_Turn_Off broadcast and link state check
> > code, other driver can reuse this flag if meet the similar situation.
> 
> What about testing !PME_SUPPORT in the PM Capabilities Register,
> or just re-use the struct pci_dev pme_support flag ?
> 

Hi, Christian

Thank you for your suggestions.
Our hardware supports generating PME#, supports L0s/L1/L1.1 low-power mode,
but L2/L3 low-power link state is not supported. It cannot enter the L2/L3
ready state through the PME_Turn_Off/PME_To_Ack handshake protocol.

Through the PM Capabilities Register, it can be seen that PME# is supported.
The pme_support flag is about whether PME# generation is supported, which is 
not very suitable for us.

Kind regards,
Senchuan Zhang

> 
> > 
> > Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
> > Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
> > Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > ---
> >   drivers/pci/controller/dwc/pcie-designware-host.c | 4 ++++
> >   drivers/pci/controller/dwc/pcie-designware.h      | 1 +
> >   2 files changed, 5 insertions(+)
> > 
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > index 372207c33a85..8302bc7a6cbf 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > @@ -1168,6 +1168,9 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> >   	if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1)
> >   		return 0;
> > 
> > +	if (pci->no_pme_handshake)
> > +		goto stop_link;
> > +
> >   	if (pci->pp.ops->pme_turn_off) {
> >   		pci->pp.ops->pme_turn_off(&pci->pp);
> >   	} else {
> > @@ -1194,6 +1197,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci)
> >   	 */
> >   	udelay(1);
> > 
> > +stop_link:
> >   	dw_pcie_stop_link(pci);
> >   	if (pci->pp.ops->deinit)
> >   		pci->pp.ops->deinit(&pci->pp);
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > index 31685951a080..e8057db303d0 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > @@ -549,6 +549,7 @@ struct dw_pcie {
> >   	 * use_parent_dt_ranges to true to avoid this warning.
> >   	 */
> >   	bool			use_parent_dt_ranges;
> > +	bool			no_pme_handshake;
> >   };
> > 
> >   #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)
> > --
> > 2.25.1
> > 

      reply	other threads:[~2025-12-05 10:25 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-02  9:02 [PATCH v7 0/3] Add driver support for Eswin EIC7700 SoC PCIe controller zhangsenchuan
2025-12-02  9:03 ` [PATCH v7 1/3] dt-bindings: PCI: eic7700: Add Eswin PCIe host controller zhangsenchuan
2025-12-02  9:04 ` [PATCH v7 2/3] PCI: eic7700: Add Eswin PCIe host controller driver zhangsenchuan
2025-12-05 12:40   ` Krishna Chaitanya Chundru
2025-12-08 12:37     ` zhangsenchuan
2025-12-08 14:13       ` Krishna Chaitanya Chundru
2025-12-09 11:51         ` zhangsenchuan
2025-12-09 12:02           ` Krishna Chaitanya Chundru
2025-12-10 16:43   ` Bjorn Helgaas
2025-12-11 12:05     ` zhangsenchuan
2025-12-11 16:07       ` Bjorn Helgaas
2025-12-02  9:04 ` [PATCH v7 3/3] PCI: dwc: Add no_pme_handshake flag and skip PME_Turn_Off broadcast zhangsenchuan
2025-12-03 10:09   ` Christian Bruel
2025-12-05 10:24     ` zhangsenchuan [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=560d3705.f47.19aee0abfc2.Coremail.zhangsenchuan@eswincomputing.com \
    --to=zhangsenchuan@eswincomputing.com \
    --cc=Frank.li@nxp.com \
    --cc=bhelgaas@google.com \
    --cc=christian.bruel@foss.st.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=inochiama@gmail.com \
    --cc=jingoohan1@gmail.com \
    --cc=krishna.chundru@oss.qualcomm.com \
    --cc=krzk+dt@kernel.org \
    --cc=kwilczynski@kernel.org \
    --cc=linmin@eswincomputing.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=mani@kernel.org \
    --cc=mayank.rana@oss.qualcomm.com \
    --cc=ningyu@eswincomputing.com \
    --cc=ouyanghui@eswincomputing.com \
    --cc=p.zabel@pengutronix.de \
    --cc=pinkesh.vaghela@einfochips.com \
    --cc=robh@kernel.org \
    --cc=shradha.t@samsung.com \
    --cc=thippeswamy.havalige@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).