* [PATCH v2 0/3] Fix random hang up issue while kernel init
@ 2015-10-07 9:14 James Liao
2015-10-07 9:14 ` [PATCH v2 1/3] dt-bindings: soc: Add clocks for Mediatek SCPSYS unit James Liao
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: James Liao @ 2015-10-07 9:14 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w, Kevin Hilman,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Sascha Hauer,
Matthias Brugger
This patch is based on v4.3-rc4, to fix system hanging up issue
while disabling unused clocks.
There is nothing different in mtk-scpsys.c and mt8173.dtsi from v1 [1].
Changes since v1:
- Rebase to v4.3-rc4.
- Add a patch to change the corresponding binding document.
- Add a separated patch to change the dtsi.
[1] https://patchwork.kernel.org/patch/7262411/
James Liao (3):
dt-bindings: soc: Add clocks for Mediatek SCPSYS unit
soc: mediatek: Fix random hang up issue while kernel init
arm64: dts: mt8173: Add clocks for SCPSYS unit
.../devicetree/bindings/soc/mediatek/scpsys.txt | 10 ++--
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 +-
drivers/soc/mediatek/mtk-scpsys.c | 67 ++++++++++++++--------
3 files changed, 54 insertions(+), 29 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 1/3] dt-bindings: soc: Add clocks for Mediatek SCPSYS unit 2015-10-07 9:14 [PATCH v2 0/3] Fix random hang up issue while kernel init James Liao @ 2015-10-07 9:14 ` James Liao 2015-10-07 9:14 ` [PATCH v2 2/3] soc: mediatek: Fix random hang up issue while kernel init James Liao ` (2 subsequent siblings) 3 siblings, 0 replies; 6+ messages in thread From: James Liao @ 2015-10-07 9:14 UTC (permalink / raw) To: linux-arm-kernel Cc: Matthias Brugger, srv_heupstream, Kevin Hilman, Daniel Kurtz, Sascha Hauer, devicetree, linux-kernel, linux-mediatek, James Liao Add clocks needed by Mediatek VENC and VENC_LT power domianis. These clocks were needed by accessing subsystem's registers, so they need to be enabled before power on these subsystems. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> --- Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt index c051114..a6c8afc 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt @@ -17,9 +17,9 @@ Required properties: - reg: Address range of the SCPSYS unit - infracfg: must contain a phandle to the infracfg controller - clock, clock-names: clocks according to the common clock binding. - The clocks needed "mm" and "mfg". These are the - clocks which hardware needs to be enabled before - enabling certain power domains. + The clocks needed "mm", "mfg", "venc" and "venc_lt". + These are the clocks which hardware needs to be enabled + before enabling certain power domains. Example: @@ -30,7 +30,9 @@ Example: infracfg = <&infracfg>; clocks = <&clk26m>, <&topckgen CLK_TOP_MM_SEL>; - clock-names = "mfg", "mm"; + <&topckgen CLK_TOP_VENC_SEL>, + <&topckgen CLK_TOP_VENC_LT_SEL>; + clock-names = "mfg", "mm", "venc", "venc_lt"; }; Example consumer: -- 1.9.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/3] soc: mediatek: Fix random hang up issue while kernel init 2015-10-07 9:14 [PATCH v2 0/3] Fix random hang up issue while kernel init James Liao 2015-10-07 9:14 ` [PATCH v2 1/3] dt-bindings: soc: Add clocks for Mediatek SCPSYS unit James Liao @ 2015-10-07 9:14 ` James Liao 2015-10-07 9:14 ` [PATCH v2 3/3] arm64: dts: mt8173: Add clocks for SCPSYS unit James Liao [not found] ` <1444209281-25536-1-git-send-email-jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> 3 siblings, 0 replies; 6+ messages in thread From: James Liao @ 2015-10-07 9:14 UTC (permalink / raw) To: linux-arm-kernel Cc: Matthias Brugger, srv_heupstream, Kevin Hilman, Daniel Kurtz, Sascha Hauer, devicetree, linux-kernel, linux-mediatek, James Liao In kernel late init, it turns off all unused clocks, which needs to access subsystem registers such as VENC and VENC_LT. Accessing MT8173 VENC registers needs two top clocks, mm_sel and venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel. So we need to keep these clocks on before accessing their registers. This patch keeps venc_sel / venclt_sel clock on when VENC / VENC_LT's power is on, to prevent system hang up while accessing its registeres. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> --- drivers/soc/mediatek/mtk-scpsys.c | 67 +++++++++++++++++++++++++-------------- 1 file changed, 44 insertions(+), 23 deletions(-) diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c index 164a7d8..06032ba 100644 --- a/drivers/soc/mediatek/mtk-scpsys.c +++ b/drivers/soc/mediatek/mtk-scpsys.c @@ -54,12 +54,16 @@ #define PWR_STATUS_USB BIT(25) enum clk_id { + MT8173_CLK_NONE, MT8173_CLK_MM, MT8173_CLK_MFG, - MT8173_CLK_NONE, - MT8173_CLK_MAX = MT8173_CLK_NONE, + MT8173_CLK_VENC, + MT8173_CLK_VENC_LT, + MT8173_CLK_MAX, }; +#define MAX_CLKS 2 + struct scp_domain_data { const char *name; u32 sta_mask; @@ -67,7 +71,7 @@ struct scp_domain_data { u32 sram_pdn_bits; u32 sram_pdn_ack_bits; u32 bus_prot_mask; - enum clk_id clk_id; + enum clk_id clk_id[MAX_CLKS]; }; static const struct scp_domain_data scp_domain_data[] __initconst = { @@ -77,7 +81,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_VDE_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(12, 12), - .clk_id = MT8173_CLK_MM, + .clk_id = {MT8173_CLK_MM}, }, [MT8173_POWER_DOMAIN_VENC] = { .name = "venc", @@ -85,7 +89,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_VEN_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(15, 12), - .clk_id = MT8173_CLK_MM, + .clk_id = {MT8173_CLK_MM, MT8173_CLK_VENC}, }, [MT8173_POWER_DOMAIN_ISP] = { .name = "isp", @@ -93,7 +97,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_ISP_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(13, 12), - .clk_id = MT8173_CLK_MM, + .clk_id = {MT8173_CLK_MM}, }, [MT8173_POWER_DOMAIN_MM] = { .name = "mm", @@ -101,7 +105,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_DIS_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(12, 12), - .clk_id = MT8173_CLK_MM, + .clk_id = {MT8173_CLK_MM}, .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 | MT8173_TOP_AXI_PROT_EN_MM_M1, }, @@ -111,7 +115,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_VEN2_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(15, 12), - .clk_id = MT8173_CLK_MM, + .clk_id = {MT8173_CLK_MM, MT8173_CLK_VENC_LT}, }, [MT8173_POWER_DOMAIN_AUDIO] = { .name = "audio", @@ -119,7 +123,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_AUDIO_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(15, 12), - .clk_id = MT8173_CLK_NONE, + .clk_id = {MT8173_CLK_NONE}, }, [MT8173_POWER_DOMAIN_USB] = { .name = "usb", @@ -127,7 +131,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_USB_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(15, 12), - .clk_id = MT8173_CLK_NONE, + .clk_id = {MT8173_CLK_NONE}, }, [MT8173_POWER_DOMAIN_MFG_ASYNC] = { .name = "mfg_async", @@ -135,7 +139,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_MFG_ASYNC_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = 0, - .clk_id = MT8173_CLK_MFG, + .clk_id = {MT8173_CLK_MFG}, }, [MT8173_POWER_DOMAIN_MFG_2D] = { .name = "mfg_2d", @@ -143,7 +147,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_MFG_2D_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(13, 12), - .clk_id = MT8173_CLK_NONE, + .clk_id = {MT8173_CLK_NONE}, }, [MT8173_POWER_DOMAIN_MFG] = { .name = "mfg", @@ -151,7 +155,7 @@ static const struct scp_domain_data scp_domain_data[] __initconst = { .ctl_offs = SPM_MFG_PWR_CON, .sram_pdn_bits = GENMASK(13, 8), .sram_pdn_ack_bits = GENMASK(21, 16), - .clk_id = MT8173_CLK_NONE, + .clk_id = {MT8173_CLK_NONE}, .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MFG_S | MT8173_TOP_AXI_PROT_EN_MFG_M0 | MT8173_TOP_AXI_PROT_EN_MFG_M1 | @@ -166,7 +170,7 @@ struct scp; struct scp_domain { struct generic_pm_domain genpd; struct scp *scp; - struct clk *clk; + struct clk *clk[MAX_CLKS]; u32 sta_mask; void __iomem *ctl_addr; u32 sram_pdn_bits; @@ -212,11 +216,16 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) u32 sram_pdn_ack = scpd->sram_pdn_ack_bits; u32 val; int ret; + int i; + + for (i = 0; i < MAX_CLKS && scpd->clk[i]; i++) { + ret = clk_prepare_enable(scpd->clk[i]); + if (ret) { + for (--i; i >= 0; i--) + clk_disable_unprepare(scpd->clk[i]); - if (scpd->clk) { - ret = clk_prepare_enable(scpd->clk); - if (ret) goto err_clk; + } } val = readl(ctl_addr); @@ -282,7 +291,10 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) return 0; err_pwr_ack: - clk_disable_unprepare(scpd->clk); + for (i = MAX_CLKS - 1; i >= 0; i--) { + if (scpd->clk[i]) + clk_disable_unprepare(scpd->clk[i]); + } err_clk: dev_err(scp->dev, "Failed to power on domain %s\n", genpd->name); @@ -299,6 +311,7 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) u32 pdn_ack = scpd->sram_pdn_ack_bits; u32 val; int ret; + int i; if (scpd->bus_prot_mask) { ret = mtk_infracfg_set_bus_protection(scp->infracfg, @@ -360,8 +373,8 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) expired = true; } - if (scpd->clk) - clk_disable_unprepare(scpd->clk); + for (i = 0; i < MAX_CLKS && scpd->clk[i]; i++) + clk_disable_unprepare(scpd->clk[i]); return 0; @@ -375,7 +388,7 @@ static int __init scpsys_probe(struct platform_device *pdev) { struct genpd_onecell_data *pd_data; struct resource *res; - int i, ret; + int i, j, ret; struct scp *scp; struct clk *clk[MT8173_CLK_MAX]; @@ -405,6 +418,14 @@ static int __init scpsys_probe(struct platform_device *pdev) if (IS_ERR(clk[MT8173_CLK_MFG])) return PTR_ERR(clk[MT8173_CLK_MFG]); + clk[MT8173_CLK_VENC] = devm_clk_get(&pdev->dev, "venc"); + if (IS_ERR(clk[MT8173_CLK_VENC])) + return PTR_ERR(clk[MT8173_CLK_VENC]); + + clk[MT8173_CLK_VENC_LT] = devm_clk_get(&pdev->dev, "venc_lt"); + if (IS_ERR(clk[MT8173_CLK_VENC_LT])) + return PTR_ERR(clk[MT8173_CLK_VENC_LT]); + scp->infracfg = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "infracfg"); if (IS_ERR(scp->infracfg)) { @@ -428,8 +449,8 @@ static int __init scpsys_probe(struct platform_device *pdev) scpd->sram_pdn_bits = data->sram_pdn_bits; scpd->sram_pdn_ack_bits = data->sram_pdn_ack_bits; scpd->bus_prot_mask = data->bus_prot_mask; - if (data->clk_id != MT8173_CLK_NONE) - scpd->clk = clk[data->clk_id]; + for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) + scpd->clk[j] = clk[data->clk_id[j]]; genpd->name = data->name; genpd->power_off = scpsys_power_off; -- 1.9.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 3/3] arm64: dts: mt8173: Add clocks for SCPSYS unit 2015-10-07 9:14 [PATCH v2 0/3] Fix random hang up issue while kernel init James Liao 2015-10-07 9:14 ` [PATCH v2 1/3] dt-bindings: soc: Add clocks for Mediatek SCPSYS unit James Liao 2015-10-07 9:14 ` [PATCH v2 2/3] soc: mediatek: Fix random hang up issue while kernel init James Liao @ 2015-10-07 9:14 ` James Liao [not found] ` <1444209281-25536-1-git-send-email-jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> 3 siblings, 0 replies; 6+ messages in thread From: James Liao @ 2015-10-07 9:14 UTC (permalink / raw) To: linux-arm-kernel Cc: Matthias Brugger, srv_heupstream, Kevin Hilman, Daniel Kurtz, Sascha Hauer, devicetree, linux-kernel, linux-mediatek, James Liao Add clocks needed by Mediatek VENC and VENC_LT power domianis. These clocks were needed by accessing subsystem's registers, so they need to be enabled before power on these subsystems. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 06a1564..30fb201 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -227,8 +227,10 @@ #power-domain-cells = <1>; reg = <0 0x10006000 0 0x1000>; clocks = <&clk26m>, - <&topckgen CLK_TOP_MM_SEL>; - clock-names = "mfg", "mm"; + <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_VENC_SEL>, + <&topckgen CLK_TOP_VENC_LT_SEL>; + clock-names = "mfg", "mm", "venc", "venc_lt"; infracfg = <&infracfg>; }; -- 1.9.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
[parent not found: <1444209281-25536-1-git-send-email-jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>]
* Re: [PATCH v2 0/3] Fix random hang up issue while kernel init [not found] ` <1444209281-25536-1-git-send-email-jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> @ 2015-10-12 16:32 ` Matthias Brugger [not found] ` <561BE09B.3040702-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 0 siblings, 1 reply; 6+ messages in thread From: Matthias Brugger @ 2015-10-12 16:32 UTC (permalink / raw) To: James Liao, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Cc: srv_heupstream-NuS5LvNUpcJWk0Htik3J/w, Kevin Hilman, Daniel Kurtz, Sascha Hauer, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r On 07/10/15 11:14, James Liao wrote: > This patch is based on v4.3-rc4, to fix system hanging up issue > while disabling unused clocks. > > There is nothing different in mtk-scpsys.c and mt8173.dtsi from v1 [1]. > > Changes since v1: > - Rebase to v4.3-rc4. > - Add a patch to change the corresponding binding document. > - Add a separated patch to change the dtsi. > > [1] https://patchwork.kernel.org/patch/7262411/ > > James Liao (3): > dt-bindings: soc: Add clocks for Mediatek SCPSYS unit > soc: mediatek: Fix random hang up issue while kernel init > arm64: dts: mt8173: Add clocks for SCPSYS unit > > .../devicetree/bindings/soc/mediatek/scpsys.txt | 10 ++-- > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 +- > drivers/soc/mediatek/mtk-scpsys.c | 67 ++++++++++++++-------- > 3 files changed, 54 insertions(+), 29 deletions(-) > > -- > 1.9.1 > > Applied. Does this fix also needs to be applied to earlier kernel versions? Thanks, Matthias -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 6+ messages in thread
[parent not found: <561BE09B.3040702-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH v2 0/3] Fix random hang up issue while kernel init [not found] ` <561BE09B.3040702-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> @ 2015-10-13 2:21 ` James Liao 0 siblings, 0 replies; 6+ messages in thread From: James Liao @ 2015-10-13 2:21 UTC (permalink / raw) To: Matthias Brugger Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, srv_heupstream-NuS5LvNUpcJWk0Htik3J/w, Kevin Hilman, Daniel Kurtz, Sascha Hauer, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Hi Matthias, On Mon, 2015-10-12 at 18:32 +0200, Matthias Brugger wrote: > > On 07/10/15 11:14, James Liao wrote: > > This patch is based on v4.3-rc4, to fix system hanging up issue > > while disabling unused clocks. > > > > There is nothing different in mtk-scpsys.c and mt8173.dtsi from v1 [1]. > > > > Changes since v1: > > - Rebase to v4.3-rc4. > > - Add a patch to change the corresponding binding document. > > - Add a separated patch to change the dtsi. > > > > [1] https://patchwork.kernel.org/patch/7262411/ > > > > James Liao (3): > > dt-bindings: soc: Add clocks for Mediatek SCPSYS unit > > soc: mediatek: Fix random hang up issue while kernel init > > arm64: dts: mt8173: Add clocks for SCPSYS unit > > > > .../devicetree/bindings/soc/mediatek/scpsys.txt | 10 ++-- > > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 +- > > drivers/soc/mediatek/mtk-scpsys.c | 67 ++++++++++++++-------- > > 3 files changed, 54 insertions(+), 29 deletions(-) > > > > -- > > 1.9.1 > > > > > > Applied. Does this fix also needs to be applied to earlier kernel versions? No need, because venc and venc_lt clocks are not controlled by CCF before v4.2. Best regards, James -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 6+ messages in thread
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2015-10-07 9:14 [PATCH v2 0/3] Fix random hang up issue while kernel init James Liao
2015-10-07 9:14 ` [PATCH v2 1/3] dt-bindings: soc: Add clocks for Mediatek SCPSYS unit James Liao
2015-10-07 9:14 ` [PATCH v2 2/3] soc: mediatek: Fix random hang up issue while kernel init James Liao
2015-10-07 9:14 ` [PATCH v2 3/3] arm64: dts: mt8173: Add clocks for SCPSYS unit James Liao
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2015-10-12 16:32 ` [PATCH v2 0/3] Fix random hang up issue while kernel init Matthias Brugger
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2015-10-13 2:21 ` James Liao
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